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Wireshark is reporting incorrect frame check sequence when using Gigabit Ethernet on Mimas A7.
* RGMII interface is being used.
* Autonegotiation succeeds at 1G
* Mimas A7 tries to respond to ARP r…
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First of all, thanks for the awesome project! This has been a real joy to tinker with, and I've learnt a huge amount doing so.
I'm currently trying to build and flash the firmware on my Nexys Video…
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Here is the current list of PEP8 errors in litex
```
running pep8
./setup.py:13:1: E302 expected 2 blank lines, found 1
./setuptools_pep8-0.9.0-py3.4.egg/tests/test_pep8_command.py:24:80: E501 line t…
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Hi,
I have started a project where I want to create a scaling function on the FPGA. The FPGa should accept input from DP and HDMI and send out DP.
Ex: Old application uses 480p. It is send to FPGA f…
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I'd love to use it even with just the basic simple functionality.
See https://github.com/mithro/HDMI2USB-litex-firmware/blob/probot-autolabeler/.github/autolabeler.yml for example :-)
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The serwb clocking is needlessly complicated (too many clock domains) and precludes the use of Xilinx-recommended clocking schemes for the IOSERDES:
https://www.xilinx.com/support/documentation/appli…
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- memory operation commands in trace debugger
- I had to manually increase tlClientXactIdBits to avoid uncached crossbar lost id field.
- test softfloat
- test snooping
- test nasti
[done] memory map…
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Hi,
first of all, thanks for the work in figuring this out. This is not a real issue but more of a dump of relevant keywords so that other people may find a solution to another crash:
The D2XX …
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A BUFMR was added on the output of the MMCM in order to get this core to work with Nexys Video. Doing this allows the MMCM that is instantiated to be in the bank above or below the bank attached to th…
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- http://en.wikipedia.org/wiki/DisplayPort
```
DisplayPort is a digital display interface developed by the Video Electronics Standards
Association (VESA). The interface is primarily used to connect a…