-
## Expected Behavior
`sram512x8m8wm1` DRC clean
## Actual Behavior
`sram512x8m8wm1` has a violation in rule `NW.2b_5V_`
## Steps to Reproduce the Problem
1. build the pdk
2. run `python3 r…
-
## Expected Behavior
Finish the DRC run in a reasonable time
## Actual Behavior
When running both deep mode and flat mode, DRC run gets stuck in `2022-12-05 15:47:30 -0800: Memory Usage (8372300K…
-
I'm facing an LVS issue when running on any design technology gf180mcuC. The foundry gds has an extra layer `63/63` which has text related to the cell name/version/metrics, netgen treats those as pins…
-
## Expected Behavior
DRC clean
## Actual Behavior
V4.4a tagging all via4 in the design as violations. This behavior is new. See screenshot below
. I've followed the recommended adjustments and have set: `
"PL_RESIZER_DESIGN_…