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Some hard CPU cores (Zynq-7000, EOS S3) do address translation on peripheral buses - say for the CPU addresses of a bus start at 0x40020000 and CSR_BASE C definition has to have that value, but the ad…
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Hello
I'm interested in this project, since am working on a commercial version of a FIRRTL Simulator implemented in Scala for large SoC designs. Our goal is to support Rocket and Boom simulations …
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make upload命令是将应用程序下载到flash的基地址么？
这么做难道不会覆盖已经在flash中的mcs文件么？
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Hello,
I am working on the lowrisc `frame-buffer` branch and trying to understand how the VGA peripheral works. My initial objective was to increase the VGA resolution, so I started looking at the `p…
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There are many issues being caused by the lack of virtual addressing.
This issues specifically involve I/O memory mapping for GPIO/Ethernet etc. and also System memory mapping for Virtualisation.
…
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Hello,
Please help me as I am struggling to upload even a small encoded file to a Linux on Litex on a VC707 FPGA. I am following the instructions from [Loading Application Files via UART](https://w…
ms3xy updated
6 months ago
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I am trying to use LitePCie for my project with the [Trenz TE0712](https://wiki.trenz-electronic.de/display/PD/TE0712+TRM) board. The target and platform files are not there in the [litex_boards](http…
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**Describe the bug**
I'm trying to compile a simple SDFG for an Intel FPGA, however I'm getting the following errors:
```
/usr/include/CL/opencl.hpp: At global scope:
/usr/include/CL/opencl.hpp:…
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@shenki has had the repl loop working in QEmu.
@mithro has had the repl loop working on Opsis hardware.
@Kathatosada got repl loop working on the MimasV2 at Linux.conf.au
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The tests/custom directory contains miscellaneous benchmarks and test programs used to bring Wally up in the early days. However, some of these are still useful and others should be removed.
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