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Hello Sir,
I tried installing Biskit as below and am getting the Error:
```
(base) m992c693@alveo:~$ pip install biskit
Collecting biskit
Downloading biskit-2.4.3.tar.gz (20.5 MB)
|█████…
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@rwarmstr got another question if you have time: I profiled the `wide_vadd` tutorial with some small
modification to add float instead of integers. I also used 4 concurrent kernels.
Environment: …
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Hello.
I have a question about the usage of nanotube-generated HLS modules.
I'd like to know what I should connect to the input and output of the AXI-Stream chain.
### What you are trying to do.
…
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Hello,
I installed an alveo u50 card on each of the two servers. The programming cable has been cross-connected.
My enviroment is below.
```
System Configuration
OS Name : L…
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This is a non-exhaustive list of some larger problems relating to XIlinx FPGA compilation and runtime execution (some with more information than others) that need some thought long term:
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Hi, I'm trying to follow your work, but I've got some issues building the Vitis Database Library GQE Kernels on Alveo U280 card.
My current environment settings are:
- OS: Ubuntu 20.04
- FPGA: Alve…
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### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/firesim)
- [X] Yes, I searched [prior issues](https://github.com/firesim/firesim/issues)
- [X] Yes…
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I am unable to build the xup_vitis_network_example, basic application for U50. Similar to #83 but with a supported OS.
**Environment:**
```
lsb_release -a
LSB Version: :core-4.1-amd64:core-4.1-…
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I've just got this problem while building the driver. So I'm using an Alveo U200 100g version, I've installed the kernnel source code and its headers, I ran the synthesis and implementation and gener…
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Hi Alex,
I have organized some 10G hardware (QSFP28->SFP+ converters, 10G SFP+ modules, fibre cables). Your verilog-ethernet VCU118 10G loopback runs like charm. However, there is no 10G version of…