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Recently I got some requests about problems with upgrading the firmware using an USB-Blaster. Instead of using e-mails I would like to collect the relevant information into this thread. Maybe this cou…
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Hello. I saw several projects aiming to integrate softcore to Arduino IDE in a way that the FPGA can then be programmed in C quite easily without much user setup.
For example the lattuino project:
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```
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## CaribouLite DUMP1090 - ADS-B Receiver ##
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[INFO] SoapyCaribouliteSe…
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Board resets when programming all 17 FPGAs for max current draw. (see anurag's test suite for more details)
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Hello! I'm relative new to Xilinx FPGAs and ordered one of these boards. I'm wondering what is the best way to actually do some FPGA development on this board? I think I can put the bitstream file to …
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After merging https://github.com/bittide/bittide-hardware/pull/424 we're stuck with a pretty TODO in our code base:
```haskell
-- TODO: We used to perform a HITL test where the CPU would write…
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**Is your enhancement proposal related to a problem? Please describe.**
Currently, `fpga_load()` expects the entire bitstream to be stored in a contiguous memory region. Because bitstream files tend …
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This may not be as useful as tri/saw XOR but it yields kinda interesting sound nonetheless.
I don't know if it will reduce or increase LUT usage because I have zero experience with FPGA programming…
LTVA1 updated
5 months ago
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Could this project add Xilinx Virtual Cable Support? JTAG and programming are very solid in this project, found some other XVC project, like https://github.com/kholia/xvcpi and https://github.com/Berk…
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Hi, I made a slightly modified version of the board without much changing(downloading circuit unchanged), and now I have some problems with SRAM programming: moving R9 to R19 doesn't work. I'm using a…