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### Version
Yosys 0.46+124 (git sha1 d1695ad9980466ca49d7931ffbc600517682785f, g++ 9.4.0-1ubuntu1~20.04.3 -fPIC -O3)
### On which OS did this happen?
Linux
### Reproduction Steps
read_verilog rtl…
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Thanks a lot for your work. I am kind of new to xilinx development and this repo has helped me a lot understanding more.. I work on Zynq MP US+ on mercury xu5 on st1 dev board from enclustra
I am t…
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## Introduction
The proposal is add a new type of DMA callback (or possibly modify the current DMA callback function), adding a new `uint32_t transferred`:
```c
typedef void(* dma_callback_with_len…
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Envrionment: Ubuntu20.04, Vitis 2020.2, platform=xilinx_zcu102_base_202020_1
Hello, I'm new to HLS deisgn and attracted by this repository. I've written a lightweight project and successfully synth…
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I'm trying to setup Aurora-HLS on Noctua2 on Node `n2fpga17` with 2 `xcu280_u55c_0` connected together in the following [configuration](https://pc2.github.io/fpgalink-gui/index.html?import=%20--fpgali…
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Recently, I have been working on deploying my LightGBM model on an Alveo U50 FPGA card using Conifer. To achieve this, I implemented a [LightGBM converter](https://github.com/zjzjwang/conifer/blob/add…
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## Prerequisites
Please make sure to check off these prerequisites before submitting a bug report.
- [x] Test that the bug appears on the current version of the dev-branch. Make sure to include the …
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Hello, I saw the issue you posted before, as shown below. I have the same problem as you did. My MC only supports DFI, but I want to verify it on xilinx MIG. I have learned some transfer processes bef…
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Hi,
I'm using Petalinux 2023.1 but I suspect this issue applies to other versions too. If CONFIG_PRE_MIRROR_URL is set to the exact default URL of:
```python
http://petalinux.xilinx.com/sswrel…
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Unable to detect USB devices on fresh build of the latest version of bpLinux.
2CG running on HDK.
Followed the steps in https://github.com/NextGenRF-Design-Inc/bytepipe_sdk/blob/main/src/petalin…