-
Hello folks,
When trying to run the hx8ksim in picosoc I want to enable the debug registers for the cpu core and hit this issue. While in toplevel testbench it works perfectly fine, any hints what co…
-
Was looking at that "variants" the picorv32 supported and found out it is not checking (or using) the variant CPU config at all.
See https://github.com/enjoy-digital/litex/blob/a44181e7166da1d15d68…
-
Hi,
I've got an issue while trying to execute a code compiled by *riscv64-unknown-elf-gcc-8.2.0-2019.02.0-x86_64-linux-centos6* (from https://www.sifive.com/boards/) on the *ibex* core.
Listing:
…
-
After getting this "connection refused" error 3 consecutive times when doing a `sudo make -j$(nproc) build-tools` in exactly the same place:
```
[...snip...]
HEAD is now at c3ad555... Merge pull …
-
Is an ADC example for Alhambra 2 available? May be one using picorv32?
I only found one for "MCP300x A/D controller (SPI master)" but as I understand is this the wrong chip and interface (SPI inste…
-
Heya!
Wanted to reach out and see if this would be compatible with a BlackIce board? I'd love to use the IceStorm tools to get this running!
Thank you!
-
Based on https://github.com/cliffordwolf/picorv32/issues/92 I enhanced the design to 32 output pins as shown here (renamed leds[7:0] to outp[31:0]):
![grafik](https://user-images.githubusercontent.co…
-
As mentioned in https://github.com/cliffordwolf/picorv32/issues/92; "The firmware should be uploaded in the flash memory using iceprog, outside of icestudio. In future versión we will integrate it int…
-
Hey Clifford,
I build a small RiscV processor to get a bit of practice in the topic. The core is working but I want to verify that the core is really ISA conform. For this purpose, is modifie…
-
The disassembled code is as follows:
0xbfc80268: 0007a703 lw a4,0(a5)
0xbfc8026c: 00071863 bnez a4,16 # 0xbfc8027c
0xbfc80270: 800…