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Hi,
When I was building the bitstream, there is an issue:
```
(artiq-2016-02-25)lanlangugugu@Aiden:~/artiq-dev$ export PATH=/usr/local/llvm-or1k/bin:$PATH
(artiq-2016-02-25)lanlangugugu@Aiden:~/arti…
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Hi Clifford
1. Tried targeting the picorv32 to spartan6 board (papilio pro). Unfortunately the port didn't run on the
target. On further investigation, noticed that while behavioral simulation…
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@ajitmathew was attempting to build the firmware on his Ubuntu machine, and it failed with the following message:
```
/bin/sh: 7: Bad substitution
make: *** [syn] Error 2
```
We attempted to fix it …
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Hi,
I am currently working on adding the Lattice Semi libraries to your library compile script. The problem is that some source files have the same name even though they are from different devices. S…
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Vivado 2015.2 fails to infer block ram when using the blockRamPow2 function when the type of element being stored is a user defined type. See:
https://gist.github.com/adamwalker/0b39f86bdb4925e918cf
…
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Xilinx looks having no passion to support ISE anymore.
this issue proposes to update `tools/build-xilinx.rb` by
- renaming to `tools/build-xlinx-ise.rb`,
- and adding new `tools/build-xilinx-vivado.rb…
hiyuh updated
8 years ago
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I was up to finish the vendor specific compile scripts for GHDL on Linux, when I noticed that GHDL (gcc backend) does not set a non-zero exit code if an error occurred. The Windows version (mcode back…
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# Brief explanation
On every commit, fire up a EC2 instance, build the HDMI2USB firmware. (This will require work on the HDMI2USB build system too.) Should auto-commit the firmware to the HDMI2USB pr…
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I used Fedora19 and Xilinx_Ise 14.6 for NetFPGA 1G-CML. When I source the environment and run make cores it shows like below:
for lib in axi_uartlite_v1_01_a axi_emc_v1_01_a bram_block_v1_00_a proc_c…
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The Xilinx Zynq-7000 series devices are a combined ARM processor with a "series 7" FPGA. The [Digilent ZYBO](http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,1198&Prod=ZYBO) is a very chea…