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Currently, we have three tester interfaces:
- Circuit ("synthesizable") tester, the only tester included in chisel3 (everything else lives in a separate repo). The testdriver, like the DUT, is synthe…
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Natalie and I are wondering if it's possible to add 3 new c-shaped blocks (like the forever loop) to the sensing category that respond to changes in voltage to an input pin:
- on change from OFF to…
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I tried create CMOS full adder cell from PSX CPU and encount error. When I try switch pin B or C in given circuit from 0 to 1 not order of update of elements rise error.
At picture there are full a…
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- [x] Remove simulations page from schematic (let's just leave the Spice files in the repository)
- [x] Update power budget
- [x] Use two output resistors in series/parallel to improve power handlin…
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This is a question for Paul Falstad, since the code is his and dates back to the original Java simulator.
I've been looking over the transistor model in TransistorElm.java, and I have to admit I'm …
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i try to get openLRS with PX4 to work, but no success so far. I found a [post ](http://diydrones.com/forum/topics/apm-ppm-from-openlrsng?commentId=705844%3AComment%3A1737913)where someone describes th…
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Base diff from class project: https://github.com/phanrahan/magma/compare/simulator
Test code: https://github.com/shacklettbp/magmasimulator
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There may be way to overcome #34 and #41.
I started implementation of `spice4qucs` extension. This extension allows you to switch between `qucsator` simulation kernel and `ngspice` simulation kernel.…
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After upgrading from pyasn1 0.2.3 to 0.3.2, importing asn1ate output takes about 1 minute, and allocates ~6 GB memory. Same with current master. I would guess it is due to some (almost) infinite recur…
per42 updated
7 years ago
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# **The Problem**
Powergame, metaknowledge, and general frustration everywhere!
There's two aspects to this problem:
- _The antag-experts_: Simply put, the fact that people know EVERYTHING about any …