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When using universal-ctags as the default parser in gtags I get this warning:
```
Using configuration file '/Users/hisnawi/gitproject/gtags.conf'.
Using configuration label 'default'.
Using '…
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Following on the ICEs from the nll-1 crater run in #52054 (a run _without_ 2-phase-borrows), here are the 569 ICEs from the nll-3 run (a run _with_ 2-phase-borrows).
#### unexpected panic 1 — known…
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I am using PrismJS on my website for code blocks. Issue is, on Chrome on Windows 7, Syntax highlighting and line numbering working only on first occasion, so for next code blocks, it is not working. S…
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macOS 10.13
Apple LLVM version 9.0.0 (clang-900.0.38)
The commands run are
```
./autogen.sh
./configure --prefix=/opt/local
make
```
The error messages are
```
Undefined symbols for a…
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This is an issue to collect various issues related to the current regexp-based VHDL parser which can be solved by introducing a more proper parser
- See #144
- See #74
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These are all the packages in build-constraints.yaml that have been disabled for one reason or another. Most have comments stating why it occurred but it's likely that the reasons have changed by now,…
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**Describe the bug**
in a java project, on a method, I run the command `xref-find-references` emacs shows: `wrong type argument: hash-table-p, nil`
**To Reproduce**
in a java project. run `xr…
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Hi,
I'm trying to analyze/elaborate/simulate a VHDL project composed by some files.
One of these, is generating this error.
This file is really big (~12GB for 500.000 rows); it's not an archite…
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I'm compiling a large set of code with both VHDL and Verilog files when I run into the "circular reference" error. Basically I have something like this:
In file1.v:
module TVSENSE
…
In file2.v…
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Parser threw the following error when copying this port (autogenerated from HDL Designer's State Machine tool from the legacy design)
```
ENTITY MRB_trigger IS
PORT(
CE : IN…