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[edalize](https://github.com/olofk/edalize) is probably the most popular library for interfacing to EDA tooling and [used by the FuseSoC tooling](https://fusesoc.readthedocs.io/en/rtd/tutorials/1-gett…
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Currently `ci-fusesoc-action` uses container based action (https://docs.github.com/en/actions/creating-actions/creating-a-docker-container-action) to run `fusesoc` which makes easy to pull in fusesoc …
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Would allow for much better portability and integration in to a higher level design. Allows for interface wrappers.
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When running `make env` from the root directory everything passes fine. Later if any of CMake scripts gets modified and a command `make ` is invoked CMake tires to re-generate related Makefiles. Then …
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The Yosys flow in `syn` currently ingests source files from the rtl directory and other places, feeds them through sv2v, and then passes them through yosys.
Since https://github.com/lowRISC/ibex/pu…
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**$ fusesoc run --target=sim swervolf**
INFO: Preparing ::cdc_utils:0.1
INFO: Downloading fusesoc/cdc_utils from github
INFO: Preparing chipsalliance.org:cores:SweRV_EH1:1.8
INFO: Downloading chip…
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### Description
I do not have a VM running Ubuntu, I only have a Container.
I don't have ivado installed in the container, but I do have Vivado running on CentOS.
I'd like to generate all the Viv…
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I integrated several [armadeus boards](http://www.opossom.com/english/index.html) in the blinky project.
These boards are all built with spartan fpga and use ISE toolchain for synthesis.
Constructin…
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I got this error when running `fusesoc` recently
````
ERROR: Conflicting requirements:
Requirements: 'microwatt == 0-0'
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Is there any way to generalize this flow including verilator as a simulator? thanks in advance!