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@avakar Would you be able to add some code comment / documentation on the [purpose of some top-level signals](https://github.com/avakar/usbcorev/blob/master/usb.v#L1-L29) ? otherwise user would need t…
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Safe
Sketchy
Unsafe
![Nz7lrGP](https://user-images.githubusercontent.com/6632311/95995663-a792ff80-0de6-11eb-92d3-8a0c43ca1a34.png)
I don't think it would be remiss to have a mouseover toolt…
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**GOAL & SPECIFICATIONS**
- One tile for "available banishes", showing the user the banishes they still have available in the KoL day. Should identify the banishes by name and show the # remaining.
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Hi,
I was wondering if there are any plans for other FPGA ports. I'd mostly be interested in Zedboard and ZCU102.
In the past these ports (and softcores as standalone projects in general) have bee…
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Hello,
I'm building a softcore based on Briey.
I've the AxiCrossbar without Sdram and on the APB3Bridge 1 Timer, 1 UartCtrl, 1 Gpio.
On the APB3 I would like to add a custom Ctrl to transfer in a…
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### Resource Title
learn-FPGA episode II: pipelining
### Resource Description
This tutorial explains how to transform the basic softcore from [episode I](https://github.com/BrunoLevy/learn-fp…
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After the Local Achievements issue turned to this topic and it was recommended by a Xenia member to be spun off into its own issue, I saw no one had done it yet and decided to try my hand at giving so…
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FPU emulation is buggy.
khval updated
3 years ago
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### Check for duplicates
- [X] I've checked for duplicate issues by using the search function of the [issue tracker](https://github.com/PathOfBuildingCommunity/PathOfBuilding/issues)
### Is your…
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Before implementing a specific GPU Kernel we should run a performance test in order to (a) get an impression what the state of the art is, and (b) make sure we're not running into problems by picking …