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The idea is to keep the source code and unit_tests in separate folders to keep the hierarchy clean.
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The DMA path for incoming data packets has alignment issues. We have byte alignment for writing to DMA, but I am not aware of a way to write less than the size of the AXI4 interface (64B). Because the…
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> Installing SVUnit will work only if you have a simulator installed.
> If you don't have the simualator, refer #25
- [x] Download the project
- [x] Follow the steps in the README
- [x] Under…
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How to set verbosity level using `runSVUnit` command.
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This may or may not be related. In addition to a receive only antenna (Beverage) that I attach to
port RX2, I also attach a preamplified and multi coupled Shared Apex Loop on Ant Port 3, and my
pri…
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Using `-out` option in create_unit_test.pl we can create multiple unit test template for single UUT.
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Using `-t` option in runSVUnit we can run single unit test from group of unit test.
> This is useful when we have multiple files in our testbench (driver, monitor, interface, etc.) and if you cha…
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I observed hanging in FPGA when CL continuously wrote to the host memory through PCIM. Each write request contains 512B (awlen=7). The hanging is only observed at 136MHz CL clk, but not observed when …
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**Impact**: rtl
**Tell us about your environment:**
*Chipyard Version:* 1.5.0, also the version in the docker image
*OS:* Ubuntu 20.04, and Ubuntu 18.04.5 from the docker image
*Other:* Do `so…
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How to deal with unused io signal in blackbox？
```scala
case class BlackBox_T() extends BlackBox{
val axis = slave(Axi4(Axi4Config(
addressWidth = 30,
dataWidth = 512,
idWidth…