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Hosting Request
- Hosting Unit(Lab) Name: Digital Logic Design Lab
- Repository URL: https://github.com/virtual-labs/digital-logic-design-iiith
- Branch/Tag :[ master/v1.1.3](https://github.com/v…
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Edit timescale and signal sequences.
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Hello, I hope you are having a great day. I am trying to compare the waveforms of the test circuit (I found out it was a counter) with the waveform of the ouput of the eFPGA after simulation, after fo…
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Hi..
Three questions ..
First, does the program generate logic circuits?
second, does it generate a circuit from a file?
Third, Does it work by command line?
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The bug is that
1) sometimes negate gate (NOT gate) fails in random delay mode. Note that the input is not an Error nor an Unknown, it is just 0, and output is also 0... I do not see how such state…
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### What should we add?
This is for discussion.
In the Estimator, it is necessary to track circuits and observables (and parameters) together. "PUB" (primitive unit block) has been proposed for …
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## *Lab OnBoarding Request*
Use this to register your lab for hosting and/or update the list
of experiments in the lab.
#### Fill the lab name to be displayed on the lab page
1. **Lab Name**: Di…
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### Is your feature request related to a problem? Please describe.
Ive ran into a problem. when trying to make complex binary logic you need a few simple things, gates, latches, and flip flops. Yes t…
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Hello @R3dst0ne,
I have identified some errors in the snapcraft.yaml file that is used to create the Snap package for Logisim-evolution. The specific issues are as follows:
- The source URL for th…
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## *Repository Creation Request*
Use this to get your experiment repository created or updated on GitHub under Virtual Labs organization.
1. #### Coordinating Institute: IIITH
2. #### Approver’…