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Thank you so much for creating this.
I am a long time software developer, who just started a master's degree in EE Digital design a month ago. Large number of tiny Forth CPU's are of interest to …
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Under 3.7.1. it says:
> The NEORV32 CFU uses the custom-1 and custom-2 opcodes to identify the instruction implemented
This should be custom-0 and custom-1 as in the rest of the datasheet?
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During emulation, the semu_start() function initializes a single HART with a hartid of 0 and a start_addr value of (RAM_SIZE - 1024 * 1024). This means that there is only one HART present throughout t…
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Hello,
I am trying openocd with jlink JTAG adapter.
My openocd_neorv32.cfg -
```
# NEORV32 on-chip debugger openOCD configuration file
# ----------------------------------------------
# Physi…
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Hello everyone,
I read your doc about how to build your model plugin. But I couldn't find any description of how the test-bench should be build. I don't know what my test-bench should do and what I n…
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I am struggling with the current organization of the core's HDL files. There are several different setups that use different file sets. Right now, only the memories allow an easy replaced (by setup- o…
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If I perform the following steps, everything builds ok using trellis, and I get the BIOS prompt.
```
cd litex-boards/litex_boards/targets
./radiona_ulx3s.py --build --device=LFE5U-85F --cpu-type=ve…
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**Describe the bug**
I use neorv32 to determine cycle counts that my custom instruction takes in a loop. My intention is to show the benefits that it apply to a certain application instead of using t…
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I'd like to experiment using Microwatt as a 64-bit microcontroller on an ECP5 LFE5U-25F. Unfortunately, even with the following patch, I can't seem to get Microwatt _and_ SoC peripherals to fit:
``…
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**Is your feature request related to a problem? Please describe.**
I am implementing NEORV32 in my own project, where the core starts up with a low frequency crystal generated clock, i.e. 12 MHz, con…