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Currently, migration can only succeed when VM is at very begining of Kernel boot. In this scenario, guest kernel have not set its timer, `cntv_cval` should be 0, and guest can then run successfully on…
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I am using sx1262 and source code from this repository to implement a LoRaWAN end device class A 1.0.3, region AS923 with ADR enabled, join and uplink process is ok, however it cannot receive downlink…
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MSGs over the CAN will send needed step position of the motors, STM should handle smooth acceleration and decceleration for smother movement of whole robot. Question is how to do that.
Ideas:
- ad…
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To make this timer2 based blinky example work, I had to add clear_interrupt_pending to the timer implementation macro.
'
/// use this in the interrupt handler
pub …
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- [x] I have searched open and closed issues for duplicates
- [x] I am submitting a bug report for existing functionality that does not work as intended
- [x] This isn't a feature request or a discu…
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### Answers checklist.
- [X] I have read the documentation [ESP-IDF Programming Guide](https://docs.espressif.com/projects/esp-idf/en/latest/) and the issue is not addressed there.
- [X] I have up…
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### Windows Build Number
10.0.19045.0
### Processor Architecture
AMD64
### Memory
2x8 GB DDR4
### Storage Type, free / capacity
NVME SSD 138 GB/ 512 GB
### Relevant apps instal…
ghost updated
3 months ago
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## ESP32-C6
- [ ] Interrupts
- [x] `LP_I2C`
- [x] `LP_IO`
- [ ] `LP_TIMER`
- [x] `LP_UART`
- [ ] `LP_WDT` (?)
## ESP32-S2/S3
- [ ] Interrupts
- [ ] `RTC_I2C`
- [x] `RTC_IO`
- [ ] `SEN…
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I was looking at the IEEE 1588 implementation and was curious regarding the following function
```
bool enet_ieee1588_read_timer(struct timespec *t) {
if (t == NULL) {
return false;
}
…
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```
I was trying to figure out how to initiate a CPU timer handler using the
CP0 count/compare registers. I finally got it working on a real ps2, but
that was after trying various ways to do it on PCS…