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Hello i am working on my thesis and my job is to implement the concurrent selfplay code to an fpga via vivado hls. I wanted to ask you if there is a way that i can run concurrent selfplay via a compil…
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We are doing a test case (as attached). By turning on --debug, we can see some messages and when the compile seems run into dead loop. But after that, any other method or message can help debug other …
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Ran make nexys4_ddr_rocket with Vivado 2018.3
and have ERRORs
any hint ?
WARNING: [filemgmt 56-315] Source scanning failed during design analysis. To get more details run synthesis or simulation …
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Run the catapullt script and get ERROR:
such as "cannot find ap_init.h / hls_stream.h"
I can convert ap_init.h to ac_init in catapult. But how to convert hls_stream.h ？
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Hello Developers,
First of all my sincere thanks for putting together this extension for vscode. Over the past few days I played around teroshdl-vscode. I would say that its a great step in bringing …
cng18 updated
2 years ago
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Hi all, I want to build ChaiDNN for ZCU106 using SDx 2018.2, but something gets wrong as below:
14:15:41] Starting logic placement..
[14:16:01] Phase 1 Placer Initialization
[14:16:01] Phase 1.1 Pl…
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I have been facing the following issue since 3 months, on cloning the analog devices github links when building petalinux project. One of these types of errors is as follows:
_ERROR: libad9361-iio-…
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Hi, I've finished all the steps in HLS and Vivado. But when i launch the xilinx SDK and start to debug the C project "zynqnet_sdk" which has a main() in cpu_top.cpp, the xilinx SDK tells me "Launch Fa…
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loujc updated
2 years ago
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Hi,
I ran the 'pynq_dpu_142m.tcl' script (folder 'block_design') in order to create the vivado project so that i could see the block design, but i got this error:
"The following IPs are not found …