TerosTechnology vscode-terosHDL issues

TerosTechnology / vscode-terosHDL

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

https://terostechnology.github.io/terosHDLdoc/

GNU General Public License v3.0

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issues

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Auto documentation bugs/wrong documentation for VHDL

#704 ArnePret opened 1 week ago
0
RivieraPro search is incorrect

#703 ArnePret opened 1 week ago
0
Separate Documentation Tables for Constants, etc.

#702 jchang-endiag opened 1 week ago
0
Vivado version not detected correctly when verifying the setup

#701 fuzesa opened 1 week ago
1
[FIX] GHDL+Yosys Schematic Viewer Temporary File Spam Fix

#700 irshbn opened 1 week ago
1
[Question] How to use testbenches?

#699 thomas-woehrle closed 1 week ago
13
[Question] Using Hierarchical Structures and Source vs. Library

#698 thomas-woehrle closed 1 week ago
4
Verify Setup issue

#697 victobui opened 2 weeks ago
0
fix config

#696 qarlosalberto closed 2 weeks ago
0
@keepports doesnt work

#695 monkey265 opened 2 weeks ago
0
Expose commands

#694 qarlosalberto closed 2 weeks ago
0
Cannot run test benches for Verilog / render schematic views

#693 washburn961 opened 2 weeks ago
1
[Question] Syntax Checking while Typing

#692 thomas-woehrle closed 1 week ago
1
Python Virtual Environments not Usable

#691 thomas-woehrle closed 3 weeks ago
4
Add files button does nothing

#690 jakefreeman closed 3 weeks ago
1
testing

#689 asaezper closed 4 weeks ago
0
Add option to support "blackboxes" and ignore libraries

#688 rameloni opened 1 month ago
0
VHDL modules using Verilog libraries - library not found

#687 rameloni opened 1 month ago
6
Check all the configuration to find errors

#686 qarlosalberto closed 1 month ago
0
Recommended flow for standalone CLI documenter?

#685 davidgussler opened 1 month ago
2
Fix ls stop

#684 qarlosalberto closed 1 month ago
0
Snippet suggestions appear twice when using TerosHDL with VHDL-LS extension

#683 davidgussler opened 1 month ago
0
Why my code doesn't produce a FSM ?

#682 FinnNGrace opened 1 month ago
0
feat: better config view

#681 qarlosalberto closed 1 month ago
0
Issues in the configuration

#680 ecstrema opened 1 month ago
0
Quartus crashes when compiling

#679 ecstrema closed 1 month ago
3
Indentation following vhdl 'when' clause

#678 SittingDuc opened 1 month ago
3
Failed to access library 'C:\Users\namhe\.teroshdl_fryIl_' at "C:\Users\namhe\.teroshdl_fryIl_".TerosHDL: modelsim(vlog-19)

#677 FinnNGrace opened 1 month ago
0
VHDL Standalone Formatter Indentation prints the value its set to (e.g 4) when formatting the document

#676 finc00 closed 1 month ago
1
feat: run yowasp-yosys from output dir

#675 qarlosalberto closed 1 month ago
0
feat: use path for base view

#674 qarlosalberto closed 1 month ago
0
feat: mix yosys vhdl and verilog

#673 qarlosalberto closed 1 month ago
0
fix quartus path, formatter and schematic

#672 qarlosalberto closed 1 month ago
0
Quartus path resolution incorrect for windows, SILENT fallback to QUARTUS_ROOTDIR

#671 dbee-novosound opened 1 month ago
3
Formatter s3sv not working

#670 IMucaMI closed 1 month ago
1
feat: allow white spaces in project name

#669 qarlosalberto closed 1 month ago
0
Spaces in Project Name Broken?

#668 jchang-endiag closed 1 month ago
2
fix: create project from directories

#667 qarlosalberto closed 1 month ago
0
Add all HDL files from a directory and subdirectories doesn't do anything

#666 JennySmith888 closed 1 month ago
1
prevent standalone schematic

#665 qarlosalberto closed 2 months ago
0
update doc

#664 qarlosalberto closed 2 months ago
0
feat: complete code refactor

#663 qarlosalberto closed 2 months ago
0
fix yosys, update LS dependencies

#662 qarlosalberto closed 2 months ago
0
Downgrades from v6.0.1 to v6.0.3

#661 ArnePret closed 2 months ago
7
Q: TerosHDL and Python virtual environments

#660 mkaiser opened 2 months ago
3
Schematic viewer with GHDL/Yosys cannot find work lib

#659 atticlabsdesign opened 2 months ago
2
Error when trying to instantiate an entity containing a generic type (VHDL 2008)

#658 vdahle opened 2 months ago
0
VUnit.project not found, check dependencies check out

#657 WernerFS closed 1 month ago
5
VHDL comment type for Verilog testbench template

#656 SebekO opened 2 months ago
0
Support for inline `if` statement in state machine viewer

#655 SebekO opened 2 months ago
0