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Hi,
I'm trying to let CFU-Playground run on qmtech wukong board. The FPGA is Xilinx Artix-7 XC7A100T.
I could build and run a 4-cores vexrisc-v + linux on this board. right now, I'm tring to…
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This is the original message; see also my following replies.
Hi, @alanvgreen :
After some testing with this update, I met a problem. when compile tflm library, it complained no found to "qm…
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Hi, @tcal-x :
I found this sample will stop output in my current setting, qmtech wukong board + buad rate 3000000. so I make some change to pass the stop problem.
here is the code.
static voi…
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First of all, let me send my personal warmest **THANK YOU** for creating this awsome HDMI framework. 😃 🙇♂️
You helped the MEGA65 project a lot with your work (https://www.mega65.org/ and see blog…
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Dear Sir:
after some try and error. there is still no video signal output from QMTech Wukong board. here is my project setting.
1. using MMCM as system clock generator.
2. using Sipeed 10 inch…
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Hi Sir:
when I use linux_2020_12_15.zip on qmtech wukong board, the Linux kernel will boot failed.
but using https://github.com/litex-hub/linux-on-litex-vexriscv/files/5281217/kc705_2020_09_25.zip…
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Hi Adam,
Thank you for your fantastic help with issue #1 . I merged your code and now I am waiting for @gardners to confirm with his HDMI analyzer, that your fix works.
While we wait, I thought …
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Hi, All
I had a FPGA board, the chip is Xilinx XC7A100T. The URL is https://github.com/ChinaQMTECH/QM_XC7A100T_WUKONG_BOARD. the board could be found in the following sites.
https://www.aliexpress…
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Hi,
sorry for bothering people here.
I'm wondering is there any guide for new comers to learn how to add a board to `litex-board` which exposes the interface for its user to configure the CPU feat…
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Hi,
Now I can debug the Briey SoC over JTAG! Tank you!
Clock Speed: 50 MHz
Test board: QMTECH Cyclone IV Starter Kit (SDRAM = W9825G6JH6)
Unfortunatelly the SDRAM does not work properly l…