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Quite excited to see what I can make of the pyVHDLparser. In using it on a simple enough file, I encounter the following:
```
======================================================================…
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Hello,
I am looking for up-to-date complete System Verilog grammar.
I know about:
* full std 2012 (but still not perfect and tested) https://github.com/Nic30/hdlConvertor/blob/master/grammars/…
Nic30 updated
4 years ago
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I'd like to help contribute to this project because I find there aren't enough VHDL parsers that are complete and open source, available for use in other projects.
This seems to be as good a place …
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@tgingold I was analyzing `ghdl_ls` and it looks like there is no documentation for `libghdl`. Few questions came into my mind. Is `libghdl` thread safe? Can multiple programs interact with `libghdl` …
m-kru updated
3 years ago
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Hi, any plans for adding support for BLIF? for importing and/or exporting?
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The format of `hdl-prj.json` is currently undocumented. This is expected, since it is in a very early development stage and it is subject to change very frequently. However, since it is the only appro…
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I'm trying to generate an html documentation file from a Thrift IDL.
This is the example.idl
![Capture](https://user-images.githubusercontent.com/6407828/58935096-ac648f80-876c-11e9-82ad-e25c74555…
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Hello
I'm interested in this project, since am working on a commercial version of a FIRRTL Simulator implemented in Scala for large SoC designs. Our goal is to support Rocket and Boom simulations …
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Hi Yuriy,
I'm not sure whether this is a bug or a known limitation of C's macro system, although I can hardly believe the latter.
I tried to add all members of the huge class [ScopeBase](https://git…
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I'm writing a file with some library functions, and would like to be able to write some tests in the same file, including expecting assertions to fail. In the terminology of [Google Test](https://gith…