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I have noticed that a parameter passed with vlogdefine is not passed to verilator. It works fine in modelsim and icarus.
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Hi,
I encountered a problem when using the [parameters] section of fusesoc together with ISE:
fussoc parameters of type "file" or "str" passed to the -generics option of xst must be quoted with …
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I was updating my commercial VHDL simulator installations, as I noticed that OSVVM is shipped in source and pre-compiled in Riviera-PRO, Active-HDL, ModelSim and QuestaSim.
Should GHDL do the same?…
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Hey there,
Maybe it's not the right place to ask, but all download links in http://opencores.org/or1k/Linux went invalid, while they were valid a few days ago. And I don't know to whom should I ask a…
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After installing fusesoc and suscessfully building de0-nano.
I tried to build the sockit build, and this the following error I received.
Warning (10306): Invalid value "block_ram" for synthesis at…
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Just a follow-up to https://github.com/openrisc/orpsoc-cores/issues/105
When Analysis and synthesis fails for "fusesoc build xxx", fusesoc prints errors to the console, but then exits with the 0 exit…
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Hello.
I have following issue: when I try to build system I get message `ERROR: Failed to build FPGA: Command 'vivado' not found. Make sure it is in $PATH`
Strange part is that I have $PATH set up p…
bqwer updated
7 years ago
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- Design: system_2x2_cccc_vcu108 and compute_tile_vcu108
STR:
1. Synthesize from host-tile branch with `fusesoc --verbose --cores-root=~/src/optimsoc/examples build optimsoc:examples:compute_tile_…
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I'm unable to run any system simulation using the latest version of fusesoc.
```
ERROR: Failed to build simulation model
ERROR: "/home/luca/dev/orpsoc-cores/systems/de0_nano/legacy_symlink.sh" e…