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Author Name: **Yu Sheng Lin** (@johnjohnlin)
Original Redmine Issue: 1333 from https://www.veripool.org
Original Assignee: Yu Sheng Lin (@johnjohnlin)
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I make a issue about "this developme…
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#### General troubleshooting steps
- [x] I have retried my command with `--force` and the issue is still present.
- [x] I have checked the instructions for [reporting bugs](https://github.com/Home…
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I have medium size project with absurd simulation run time compared with XSIM run time.
Trying to reproduce the problem with simple sources I found:
--stop-time=1us --time-resolution auto => run t…
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This time I use DE1-SOC board, 00_counter example works,
but when I downloaded the 04_memtest "program.srec" to the board with UART-USB cable, nothing happens.
Do I need to change something in th…
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When exporting Verilog add an option to name top-level signals using the name of the input/output block instead of some bizarre magic name.
Why? To be able to simulate the block using an external tes…
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Right now the measurement graph shows the level of multiwire signals. That is ok if only a handful of levels are possible. However for big buses (e.g. 32 bits) its much better to show contents and con…
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`make -i test` shows the following issues:
## List of icons with embeded bitmap images
- [x] Suru++/apps/64/aegisub.svg
- [x] Suru++/apps/64/caffeine.svg
- [x] Suru++/apps/64/caja-actions.svg
-…
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Running brew doctor results in:
```
Error: 765: unexpected token at '{
"adobe-air-sdk": "homebrew/cask",
"android-ndk": "homebrew/cask",
"android-platform-tools": "homebrew/cask",
"andro…
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I want to use x11docker for the security features but without an X server, just a Bash shell like normal docker. I tried running it with `--nothing --stdin --stdout --stderr`, it kind of work but the …
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I've been thinking long about having some multiplatform (windows and gnu/linux), free (libre), lightweight and standalone tool to analize large bodies of VHDL 2008 code at block/RTL level. That tool w…