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There are open questions that came up while Michael created the great and comprehensive new `test_programs/cpu_test.asm`. Some of them are described here: https://github.com/sy2002/QNICE-FPGA/issues/5…
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When the difference between the projects contains project references, the `project_diff` returns unexpected results:
```ruby
project_1 = {
'projectReferences' => [
…
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In responding to a TSC effort, it became clear that we are missing some context for profiles in this specification. Krste asked me to add this in as an issue here so we have all of this in one place.
…
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MWE:
```julia
using ModelingToolkit, OrdinaryDiffEq
using ModelingToolkit: t_nounits as t, D_nounits as D
@parameters p d
@variables X(t) Y(t)
eqs = [
D(X) ~ p - d*X,
Y ~ X + 1
]
…
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I applied manually all the patches and included all the sensors that I can get via sensors -j.
The "bar visual" works, however, instead of something like:
CPU temp 39ºC (crit: 100ºC)
I …
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hello ,
i wanted to focus on bit manip instructions test.
i did this .
~riscv-test/isa: make rv32uzbb
this produced me dump files and executable files.
one among them,for andn instruction,i just …
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### Discord Thread
https://discord.com/channels/828292123936948244/1278695078994378793
### What happened?
Error: ```
Hint: used config file 'C:\bin\nim\config\nim.cfg' [Conf]
Hint: used config fi…
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dma-coherent refers to "architectures which are by default non-coherent for I/O"
dma-noncoherent refers to "architectures which are by default coherent for I/O"
...but nothing in the DT spec spell…
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Just to make you aware of this:
https://github.com/riscv/riscv-isa-manual/issues/1048
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I am running an illegal instruction test and expect that some instructions to be decoded as illegal instruction. However, spike decoded is as a vector instruction. This issue is similar to https://git…