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Automation, industrial control and robotics projects need to drive motors and actuators. FPGA outputs typically don't have enough current and voltage capability to drive them directly.
While there…
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## USB no response after cable plug in
- change to another usb port (back port on mother board is the best if PC)
## normal driver status
![image](https://github.com/user-attachments/assets/14b2164…
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Hello, QuokkaCLI generate Quartus project for Cyclone IV fpga (SnakeGame demo), how can i setup custom fpga\board (terasic de10-lite, digilent nexys7 100T, etc) for future generations? Or only editing…
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1. I use this command to generate a Verilog project with wishbone bus: `python3 -m litex_boards.targets.digilent_basys3 --integrated-rom-init=test.bin --integrated-main-ram-size=0x2000 --build`, then …
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Hi
I use a JTAG HS2 probe on a JTAG chain with an artix7, I use the bsdl file provided by xilinx and I can not read ID, or scan an I/O.
Do you need to have a blank FPGA for this to work, the HS2 pro…
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## deps
```bash
sudo apt-get install libncurses5
```
## download
https://www.xilinx.com/downloadNav/vivado-design-tools/archive-ise.html
## install
```bash
tar -xvf Xilinx_ISE_DS_Lin_14.7_101…
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Hi,
So I've recently tried this on a Rpi4 with the idea to remote debug a Arty-A7 over the network from Vivado 2024.1.2
(since the xilinx tools aren't built for the ARM64)
It does build and run, …
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the main objective here is to operate a single-channel readout and display it on file. It requires at least the following steps (in semi-arbitrary order):
- [x] make scan-view read a config file
-…
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## troubleshooting
### Xilinx JTAG Programmer (USB) cable not found
> [!IMPORTANT]
> ***Only Platform Cable USB II
Platform Cable USB Model: DLC9G is supported!!!!!!!!!!!!***
> ~~do not use digi…
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Hello,
I am working with various models of RedPitaya boards and would like to integrate them into the list of supported boards in Vivado. My goal is to use these boards for FPGA development, config…