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NEMU
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Add exception check for csr and instr.
#470
NewPaulWalker
closed
1 day ago
0
rv64zfh:fix zfhmin extension compile bug and updata zfhmin config
#469
zmx2018
closed
1 week ago
0
feat(riscv64): Support RISC-V Zfa extension
#468
sinceforYy
closed
2 weeks ago
0
ci: enable crypto test
#467
cebarobot
closed
2 weeks ago
0
make: add `CPT_CROSS_COMPILE` for CPT make
#466
Tang-Haojin
closed
2 weeks ago
0
RVA23: Support Zicbom & Zicboz
#465
happy-lx
closed
2 weeks ago
1
build: disable march=native when building as ref so
#464
shinezyy
closed
3 weeks ago
6
config: enable RV_SSCOFPMF and RV_SMSTATEEN in dual-xs-ref_defconfig
#463
sinceforYy
closed
3 weeks ago
0
Bump dual-core ref config for sv48
#462
good-circle
closed
3 weeks ago
0
float: fix roundingmode update, which may modified by vector instruct…
#461
Ziyue-Zhang
closed
3 weeks ago
0
vaddr: always check misalign in vaddr_read/write
#460
happy-lx
closed
3 weeks ago
1
rv64v: fix vector int to float instruction's source data
#459
Ziyue-Zhang
closed
3 weeks ago
0
support updating tval with instr code in H extension
#458
huxuan0307
closed
2 weeks ago
2
`make menuconfig` error
#457
Donkey-Hao
closed
3 weeks ago
5
ci: add difftest with spike for nutshell
#456
cebarobot
closed
3 weeks ago
1
debug
#455
pxk27
closed
1 week ago
0
rvk: move ENC_SBOX to a independent file, avoid modifed by stack overflow
#454
Ziyue-Zhang
closed
3 weeks ago
0
fix the CONFIG_BBL_OFFSET_WITH_CPT parameter in the xs-cpt configuration
#453
zybzzz
opened
4 weeks ago
0
Error when make
#452
Jeff-Smith-debug
closed
3 weeks ago
8
Support Sv48 & Sv48x4
#451
good-circle
closed
3 weeks ago
0
rv64: add Zimop extension support
#450
huxuan0307
closed
4 weeks ago
0
Pld debug
#449
pxk27
closed
4 weeks ago
0
git: ignore gcpt_restore in submodule
#448
Tang-Haojin
closed
4 weeks ago
0
CSR: delete update_mstatus_fs and delete _32 & _64 in some VS CSR
#447
pxk27
closed
4 weeks ago
0
rv64v: fast path for unit-stride ld/st; vectorize this fast path
#446
shinezyy
closed
1 month ago
1
Support diff of hardware Unligned lst
#445
happy-lx
closed
3 weeks ago
1
build: add PGO for NEMU
#444
shinezyy
closed
1 month ago
0
add Zfh and Zfhmin extendsions,Version1.0
#443
zmx2018
closed
1 month ago
0
add RISC-V Zfh and Zfhmin Extensions V1.0
#442
zmx2018
closed
3 weeks ago
1
asm: fix riscv instrction asm log format.
#441
NewPaulWalker
closed
1 month ago
0
请教一下关于chi版本仿真的一个问题
#440
spritelzj
closed
1 month ago
1
fix(mmu): do not truncate high addr bits when ifetch exceptions occur
#439
Tang-Haojin
closed
6 days ago
8
csr: add rm permit check
#438
sinceforYy
closed
3 weeks ago
0
rv64v: execute vf inst need set mstatus.FS and mstatus.VS dirty
#437
sinceforYy
closed
1 month ago
0
rv64v: fix reading of the rs2 register of the vssseg instr with address translation enabled
#436
Anzooooo
closed
1 month ago
0
rv64v: fix vector index store check.
#435
Anzooooo
closed
1 month ago
0
pmpcfg: pmpcfg keep old value when pmpcfg.L = 1 unless reset
#434
sinceforYy
closed
1 month ago
0
There is no gcpt_restore code in MASER
#433
liangy001
opened
1 month ago
1
fix typo in monitor.c
#432
ENJOU1224
opened
1 month ago
0
csr: use "keep old value" strategy to implement WARL of xtvec.mode
#431
huxuan0307
closed
1 month ago
0
storequeue: rewrite store queue using cpp
#430
Anzooooo
closed
1 month ago
0
csr: read hedeleg without medeleg mask
#429
sinceforYy
closed
1 month ago
0
rv64v: set vstart 0 when vls inst raise access fault
#428
sinceforYy
closed
1 month ago
0
ci: build difftest so in docker
#427
Tang-Haojin
closed
1 month ago
0
rv64v: add fs check for vfmv/vfmerge inst
#426
sinceforYy
closed
1 month ago
0
priv.c: ignore mpv when mret is executed and mpp is MODE_M
#425
pxk27
closed
1 month ago
0
csr: refactor read and write *ie CSR
#424
sinceforYy
closed
1 month ago
0
difftest: guide spike to exec the instruction cause an exception.
#423
NewPaulWalker
closed
1 month ago
0
rv64: add Shlcofideleg extension to delegate LCOFIP to VS mode
#422
huxuan0307
closed
1 month ago
0
csr: fix hideleg/hedeleg mask and update *ie to sync with xiangshan
#421
sinceforYy
closed
1 month ago
0
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