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litex-hub
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linux-on-litex-rocket
Run 64-bit Linux on LiteX + RocketChip
BSD 2-Clause "Simplified" License
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Booting a lightweight image of linux on the litex simulator
#43
sramichetty20019
closed
1 week ago
1
Running Bare Metal application code on litex with cpu type rocket
#42
sramichetty20019
closed
1 week ago
1
Booting linux panic on Arty A7-100T 【uart and irq error】
#41
Comet959
closed
1 month ago
2
Arty A7-100T Boot Linux Panic about irqchip.
#40
Comet959
closed
1 month ago
1
Repo status
#39
trabucayre
closed
1 week ago
5
build busybox : fatal error:crypt.h No such file
#38
LYM-cat
closed
1 week ago
3
genesys2: full4q CPU variant not supported
#37
newinnovations
closed
9 months ago
2
Unable to build rocket cpu for terrasic de2 115
#36
arunlee77
opened
9 months ago
1
RocketChip standalone build support is deprecated upstream, requires use of SoC frameworks
#35
n-kremeris
closed
1 week ago
5
Has anyone tried having this fabricated on the OpenMPW shuttle?
#34
ryao
closed
1 week ago
6
zifencei + zicsr needed to build BBL
#33
pcotret
closed
1 year ago
3
Change Linux variant for Rocket CPU
#32
pcotret
closed
1 year ago
4
Unable to boot into linux on simulated SoC - Kernel panic
#31
OrkunAliOzkan
closed
1 year ago
11
litex_sim fails loading opensbi: Liftoff hangs
#30
OrkunAliOzkan
closed
1 year ago
4
Unable to boot Linux - userspace cannot write to console, no busybox shell
#29
n-kremeris
closed
1 year ago
7
Simulation (using Verilator) failed
#28
pcotret
closed
1 year ago
1
Issue with booting
#27
matsbror
closed
1 year ago
25
Documentation of the varying rocket cpu-variants
#26
matsbror
closed
1 year ago
2
Which cpu architecture to use in BBL building when full rocket (with fp) is used?
#25
matsbror
closed
1 year ago
2
Simulator UART address
#24
Kimplul
closed
1 week ago
3
Debug system instabilities
#23
troibe
closed
1 week ago
2
toolchains selection issue when building BBL
#22
tongchen126
closed
2 years ago
1
Boot hang with DE2-115
#21
lapnd
closed
2 years ago
6
is that possible to generate litex rocket with NVDLA?
#20
12ff7a6
opened
2 years ago
2
sqrl_acorn (cle-215+) support
#19
sajattack
closed
1 week ago
3
Adjusted timebase for Arty
#18
troibe
closed
2 years ago
1
Uploading binary fails at BAUD rates over 230400
#17
troibe
closed
2 years ago
10
conf/ecpix5.dts: fix typo
#16
tretter
closed
2 years ago
1
Adjust json2dts.py to work with Rocket
#15
troibe
opened
3 years ago
2
[WIP] Add dts for ulx3s board
#14
troibe
opened
3 years ago
2
Add dts for arty board
#13
troibe
closed
3 years ago
1
Booting into linux on simulation
#12
troibe
opened
3 years ago
10
ci: add GitHub Actions workflow
#11
jluebbe
closed
3 years ago
6
What needs to be done to get Fedora/Debian working on Rocket?
#10
cjearls
closed
1 year ago
21
Design doesn't fit on OrangeCrab FPGA
#9
cjearls
closed
3 years ago
2
Resources on creating a proper device tree
#8
troibe
closed
3 years ago
12
How to determine bit width of the point-to-point AXI link?
#7
troibe
closed
3 years ago
3
hangs and unstable cycle counts
#6
monniaux
closed
3 years ago
4
just scrolling LEDs
#5
monniaux
closed
3 years ago
3
Set up on Ubuntu might be incomplete
#4
tommythorn
closed
3 years ago
3
README: add simplified SoC diagram after short intro as discussed in #2.
#3
enjoy-digital
closed
3 years ago
1
Add a simplified diagram of the SoC in the README?
#2
enjoy-digital
closed
3 years ago
6
Prebuilt Binaries: bitstreams, boot images, intermediate software components
#1
gsomlo
opened
3 years ago
1