pymtl pymtl3 issues - Githubissues

pymtl / pymtl3

Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

BSD 3-Clause "New" or "Revised" License

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issues

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Fix deprecated ast warning

#284 KelvinChung2000 opened 3 weeks ago
0
pytest_cmdline_preparse deprecated

#283 KelvinChung2000 closed 3 weeks ago
2
Cycle Level simulation reset function not right

#282 CaseyZhu opened 1 month ago
1
Bitwidth-mismatch check failed on customized bitstruct

#281 Aegithalos-caudatus closed 3 months ago
4
Bit-replicate operator support

#280 Aegithalos-caudatus closed 5 months ago
2
Unable to use concat with InPort

#279 KelvinChung2000 closed 5 months ago
19
Improving concat

#278 KelvinChung2000 opened 5 months ago
0
fixing verilog placeholder pass

#277 KelvinChung2000 opened 5 months ago
3
Using enum for design

#276 KelvinChung2000 closed 6 months ago
3
Improve index handling in Bits and Signal classes

#275 KelvinChung2000 closed 5 months ago
5
Adding fst and struct trace support

#274 KelvinChung2000 opened 7 months ago
6
TypeError with Verilator simulation flow

#273 KelvinChung2000 closed 7 months ago
2
Adding __len__ interface and formatting to black

#272 KelvinChung2000 closed 7 months ago
2
RTL pass fail to tell value used is constant

#271 KelvinChung2000 opened 8 months ago
6
RTL gen pass fail to catch all System Verilog keyword

#270 KelvinChung2000 opened 8 months ago
5
Incorrect VCD file format

#269 KelvinChung2000 opened 8 months ago
3
Where is the tutorial？

#268 chensx00 closed 9 months ago
1
Bump cryptography from 41.0.6 to 42.0.4 in /requirements

#267 dependabot[bot] opened 9 months ago
1
Bump cryptography from 41.0.6 to 42.0.2 in /requirements

#266 dependabot[bot] closed 9 months ago
2
Bump cryptography from 41.0.6 to 42.0.0 in /requirements

#265 dependabot[bot] closed 9 months ago
2
PyMTL4.0 Release

#264 ptpan opened 10 months ago
1
Feature consideration?

#263 KelvinChung2000 opened 11 months ago
22
Add support for Verilator assertion

#262 ptpan closed 10 months ago
0
Renaming ports and signals to ensure a consistent naming convention

#261 ptpan closed 10 months ago
1
Add support for non-s args to refer to self

#260 ptpan closed 11 months ago
3
Use better error message when slicing a Bitstruct signal

#259 ptpan closed 11 months ago
0
Inconsistent simulation

#258 KelvinChung2000 closed 12 months ago
5
Incorrect range elaboration

#257 KelvinChung2000 closed 12 months ago
3
Bump cryptography from 41.0.4 to 41.0.6 in /requirements

#256 dependabot[bot] closed 11 months ago
1
Driver with signals are shown as no drivers

#255 KelvinChung2000 closed 11 months ago
6
Verilog import fixes and revamp

#254 ptpan closed 1 year ago
0
Support test-by-specification on external Verilog modules

#253 ptpan closed 10 months ago
0
Bump cryptography from 3.3.2 to 41.0.4 in /requirements

#252 dependabot[bot] closed 1 year ago
1
Support parallel Verilog co-simulation through pytest-xdist

#251 ptpan closed 1 year ago
0
Fixing dependency on the py module during pip installation

#250 ptpan closed 1 year ago
1
Port the bitstruct packed array bug fix to master branch

#249 ptpan closed 1 year ago
1
Fix Bug Caused By Struct with List Field

#248 yo96 closed 1 year ago
2
94 tests fail

#247 yurivict closed 1 year ago
1
pytest should't be in install_requires in seup.py

#246 yurivict opened 1 year ago
1
Add custom verilator pass arguments for --trace-max-width and --trace-max-array.

#245 UnsignedByte closed 10 months ago
1
Add line trace to stream-to-FL adapters

#244 ptpan closed 1 year ago
0
Add non-blocking stream FL adapters

#243 ptpan closed 1 year ago
0
Fixing double/single underscore issue in translation

#242 ptpan closed 1 year ago
0
Bump cryptography from 3.3.2 to 39.0.1 in /requirements

#241 dependabot[bot] closed 1 year ago
3
Verilator compile error

#240 hmohajeri closed 11 months ago
4
StreamSourceFL, StreamSinkFL missing.

#239 hmohajeri closed 1 year ago
4
README Verilator sentences

#238 yihuajack closed 2 years ago
1
PyMTL 4.0 release staging

#237 ptpan closed 10 months ago
2
Fix dependency on the py module

#236 ptpan closed 2 years ago
1
Toggle signals after 1/10 of clock period instead on negedge during Verilator VCD dump

#235 ptpan closed 2 years ago
0