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quartiq
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phaser
Phaser AWG DSP design
GNU General Public License v3.0
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FastLink IDELAY2.{ld,ce} not hooked up.
#23
shareefj
closed
9 months ago
4
Could not generate pulse using the Phaser code
#22
Yueh-H
closed
1 year ago
1
Stft pulsegen
#21
bagresciheejin
closed
1 year ago
2
code formatting
#20
nkrackow
closed
2 years ago
4
Nk/servo
#19
nkrackow
closed
2 years ago
2
phaser-servo ToDo
#18
nkrackow
closed
1 year ago
1
Wrong values from trf_read
#17
FabianSchwartau
closed
3 years ago
5
DSP Block Diagram
#16
RHanley1
closed
3 years ago
7
STFT pulsegen issues/ToDo
#15
nkrackow
closed
1 year ago
1
Current state of the stft pulsegen
#14
nkrackow
closed
1 year ago
1
Instability fix
#13
nkrackow
closed
3 years ago
2
Flashing/loading bitsreams via kasli-i2c
#12
RHanley1
closed
3 years ago
1
close-in noise
#11
RHanley1
closed
3 years ago
3
dac fifo alarms after cold boot
#10
jordens
closed
4 years ago
8
spectral inversion between DAC outputs and TRF output
#9
jordens
closed
3 years ago
4
HITL tests, `kasli_tester`
#8
jordens
closed
4 years ago
2
Servo
#7
jordens
closed
1 year ago
4
Abstract TRF/DAC registers
#6
jordens
closed
4 years ago
1
Interpolation filter initialization
#5
jordens
closed
3 years ago
27
IQ swapped
#4
jordens
closed
4 years ago
0
Phaser support status
#3
jordens
closed
4 years ago
19
STFT processor
#2
jordens
closed
3 years ago
11
DSP interpolation path specs
#1
jordens
closed
4 years ago
6