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riscv-aia
https://jira.riscv.org/browse/RVG-59
Creative Commons Attribution 4.0 International
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Conversion of LaTeX spec to asciidoc.
#53
wmat
opened
1 year ago
29
Conversion to asciidoc.
#52
wmat
closed
1 year ago
1
Convert LaTeX specification to AsciiDoc
#51
wmat
opened
1 year ago
0
The timing issue regarding reading *topei
#50
yichanfeng
closed
1 year ago
7
Update to ratified version 1.0
#49
jhauser-us
closed
1 year ago
0
Fix inconsistencies about virtual instruction exceptions
#48
jhauser-us
closed
1 year ago
0
Better align indirect registers with hypervisor, Smcsrind extensions
#47
jhauser-us
closed
1 year ago
0
Added clarification about the term IOMMU
#46
avpatel
closed
1 year ago
0
Interrupt flow
#45
augsug
closed
1 year ago
2
Illegal instruction exception or virtual instruction exception?
#44
vernonpang
closed
1 year ago
8
Add clarification about MSI write replaced by MRIF update
#43
avpatel
closed
1 year ago
2
Updates for RC4
#42
jhauser-us
closed
1 year ago
0
'UNSPECIFIED' Value for 'hideleg[n]', During Read-Only to Writable transition.
#41
vithursons
closed
1 year ago
2
Detecting the extension
#40
timsifive
closed
1 year ago
6
Allocate local interrupts for RAS events
#39
jhauser-us
closed
1 year ago
0
Upgrade chapter status; remove Duo-PLIC chapter to a separate document
#38
jhauser-us
closed
1 year ago
0
Allow mvien + mvip virtual interrupts SEI, SSI
#37
jhauser-us
closed
1 year ago
0
Make clear that the draft chapters won't change ratified parts
#36
cmuellner
closed
1 year ago
2
Add time capture support to ACLINT
#35
sebhub
closed
2 years ago
1
Virtualizing the contents of the IMSIC supervisor interrupt file
#34
sorear
opened
2 years ago
2
Add DPR to hvictl to specify default priority order of virtual interrupts
#33
jhauser-us
closed
2 years ago
2
behavior when CLIC implemented and enabled?
#32
JamesKenneyImperas
closed
2 years ago
2
vstopi behavior refers to vstopei
#31
JamesKenneyImperas
closed
2 years ago
2
WARL values for hvictl.IID
#30
JamesKenneyImperas
closed
2 years ago
7
Clarification of the behavior of virtual interrupts
#29
JamesKenneyImperas
closed
2 years ago
6
MSI page tables apply to all forms of memory accesses
#28
jhauser-us
closed
2 years ago
2
Updates for version 0.3.2-draft
#27
jhauser-us
closed
2 years ago
0
Numerous small improvements to text
#26
jhauser-us
closed
2 years ago
0
Clarify that reset leaves most IMSIC and APLIC state unspecified
#25
jhauser-us
closed
2 years ago
0
Remove term 'master' from AdvPLIC-ex-3Domains.png
#24
cetola
closed
2 years ago
2
Remove term 'master', replace with appropriate term
#23
cetola
closed
2 years ago
1
Jhauser 2022 stable
#22
jhauser-us
closed
2 years ago
0
Jhauser 2022 0.3.1
#21
jhauser-us
closed
2 years ago
2
Improve text about the arrangement of IMSIC pages in memory
#20
jhauser-us
closed
2 years ago
0
Replace "I/O MMU" with "IOMMU"
#19
jhauser-us
closed
2 years ago
0
Revert last commit the hard way
#18
jhauser-us
closed
2 years ago
0
Remove CSRs that set/clear an IMSIC interrupt file bit by number
#17
jhauser-us
closed
2 years ago
0
Request: Extension name (Sm*?) for CSR names support on toolchains
#16
a4lg
closed
2 years ago
2
Reorganize local and custom major interrupts
#15
jhauser-us
closed
2 years ago
0
Feature Request: Hypervisor Guest interrupts on APLIC-only systems
#14
konrad-schwarz
opened
2 years ago
0
Clarify requirements that AdvPLIC places on IMSICs.
#13
pdonahue-ventana
closed
1 year ago
3
Fix lots of typos
#12
pdonahue-ventana
closed
2 years ago
0
fix typo in intro.tex
#11
wxjstz
closed
1 year ago
1
typo issue
#10
wxjstz
closed
1 year ago
0
regarding holes in idc structures
#9
neelgala
closed
2 years ago
2
For Adv. PLIC, allow clearing level-sensitive intrs. with MSI delivery
#8
jhauser-us
closed
2 years ago
0
Reduce complexity of Adv. PLIC's msiaddrcfg registers
#7
jhauser-us
closed
2 years ago
0
typo controoler -> controller
#6
umairriaz95
closed
2 years ago
1
regarding delegation and child index
#5
neelgala
closed
2 years ago
2
vstopei when VGEIN=0
#4
pdonahue-ventana
closed
2 years ago
1
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