sifive duh-scala issues

sifive / duh-scala

⛏️ DUH component export to Scala

https://github.com/sifive/duh

Apache License 2.0

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issues

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BundleBridgeSource/Sink need ()

#83 mwachs5 closed 4 years ago
1
label emitted scala files with duh-scala version number

#82 mwachs5 opened 4 years ago
5
fix to emit correct INTERRUPT code

#81 drom closed 4 years ago
1
work towards #79 ; multiple address blocks and the emitted Object Model

#80 drom closed 4 years ago
2
What should the behavior of duh-export-scala be with respect to multiple address blocks and the emitted Object Model?

#79 richardxia closed 4 years ago
28
duh-scala/rocket-chip CLI flow does not work with module with underscore in name

#78 richardxia closed 4 years ago
9
Properly set the resources on the APBSlaveParameters.

#77 richardxia closed 4 years ago
2
Diplomacy APBSlaveNode is missing resources argument; results in missing OMMemoryRegions

#76 richardxia closed 4 years ago
0
read DUH in Scala

#75 drom opened 4 years ago
2
support native TileLink ports.

#74 drom opened 4 years ago
0
use duh-bus definitions where possible

#73 drom opened 4 years ago
0
Handle unsorted register fields

#72 richardxia closed 4 years ago
1
Interrupt is not implemented after 'duh-export-scala'

#71 RyanSangdeokPark opened 4 years ago
0
Support for AMBA3 APB

#70 drom closed 4 years ago
0
Allow for newline characters in register description.

#69 richardxia closed 4 years ago
0
Support multiline string descriptions for registers

#68 richardxia closed 4 years ago
0
Support for AXI-Stream

#67 drom opened 4 years ago
0
Replace .asOutput with Output() for chisel3 forwards compatibility.

#66 richardxia closed 4 years ago
0
Don't overpad fields by accounting for width.

#65 richardxia closed 4 years ago
1
Validation errors in CLI output are confusing

#64 richardxia closed 4 years ago
2
make dpram/spram chisel attch code overrideable

#63 albertchen-sifive opened 4 years ago
0
add TLFIFOFixer to AXI4Master adapter chain

#62 albertchen-sifive closed 4 years ago
0
added support for maxBurst

#61 drom closed 4 years ago
0
Error out if blackbox port doesn't match bus definition.

#60 richardxia closed 4 years ago
2
Fix APB port directions

#59 richardxia closed 4 years ago
0
fix chisel types and directions for analog signals

#58 albertchen-sifive closed 4 years ago
0
refactor scala codegen into separate NPM package

#57 drom opened 4 years ago
0
fixes #55 ; validate input files at the beginning.

#56 drom closed 4 years ago
0
Validate input files at the beginning

#55 richardxia closed 4 years ago
1
enable exclusion of bus fields that are not defined in rocket-chip

#54 albertchen-sifive closed 4 years ago
0
regmap: fix port connections, fix RegField wires

#53 albertchen-sifive closed 4 years ago
0
Set resetValue in OMRegFieldDesc if present.

#52 richardxia closed 5 years ago
0
use def instead of val for desiredName override

#51 albertchen-sifive closed 5 years ago
2
add support for addressUnitBits field

#50 albertchen-sifive closed 5 years ago
0
update export-scala-regmap for duh-schema 0.7.1

#49 albertchen-sifive closed 5 years ago
0
use endent for code blocks, cleanup

#48 albertchen-sifive closed 5 years ago
0
add duh-export-regmap/monitor to package.json bin

#47 albertchen-sifive closed 5 years ago
0
rename AXI4Lite to AXI4-Lite

#46 albertchen-sifive closed 5 years ago
0
use bus direction when connecting bus ports

#45 albertchen-sifive closed 5 years ago
0
make OM mems/ints overrideable, add OMRegisterMaps

#44 albertchen-sifive closed 5 years ago
0
address feedback on README.md

#43 albertchen-sifive closed 5 years ago
0
fix AXI4-Lite typo

#42 albertchen-sifive closed 5 years ago
0
document generated Scala API

#40 albertchen-sifive closed 5 years ago
1
add export-scala-monitor

#39 albertchen-sifive closed 5 years ago
2
APB: fix AddressSet mask

#38 albertchen-sifive closed 5 years ago
0
error on using inout in json5 while exporting scala

#37 ghost closed 5 years ago
5
emit 'exists' ResourceBinding in base scala

#36 albertchen-sifive closed 5 years ago
1
Memories clocking

#35 v-krvavac closed 5 years ago
6
AXI signals visibility for monitoring

#34 v-krvavac closed 4 years ago
1
add attach for LogicalTreeNode

#33 albertchen-sifive closed 5 years ago
1