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hwacha
Microarchitecture implementation of the decoupled vector-fetch accelerator
http://hwacha.org/
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hwacha scalar operations div/sqrt never receives valid from FPU
#45
alexhilaev
opened
1 year ago
0
Fixed single instructions working as double instructions and vice versa
#44
pentin-as
opened
1 year ago
0
Bump to latest rocket-chip/chisel3.5.6
#43
jerryz123
closed
1 year ago
0
Bump to scala 2.13/chisel 3.5.5/new rocketchip
#42
jerryz123
closed
1 year ago
0
fix: chisel3 pr #2758
#41
SingularityKChen
closed
1 year ago
0
Decoupled hwacha from sbus width with WidthWidgets
#40
jerryz123
closed
1 year ago
0
fix for chipsalliance/rocket-chip#3133
#39
sequencer
closed
2 years ago
1
fix: remove RocketTilesKey
#38
SingularityKChen
closed
1 year ago
0
Plans for RISC-V vector extension support
#37
wonsunahn
opened
2 years ago
0
Feature like SAXPY but with divide
#36
mbelda
opened
2 years ago
1
[DO NOT MERGE] Chisel 3.5 Bump
#35
abejgonzalez
closed
2 years ago
0
Is hwacha.org dead?
#34
omasanori
opened
3 years ago
3
remove cloneType
#33
sequencer
closed
2 years ago
0
Chisel 3.5 Bump
#32
abejgonzalez
closed
2 years ago
0
Auto-vectorizing xtensor
#31
davidbrochart
opened
3 years ago
0
fix for deprecation.
#30
sequencer
closed
2 years ago
2
Add support for building Hwacha with reduced FP precision/no FDIV/no IDIV
#29
jerryz123
opened
3 years ago
2
HOV Config's WithConfPrec?
#28
ghost
opened
3 years ago
0
question about the shared units in a lane
#27
ghost
opened
3 years ago
0
Can I use a lane number not in power of 2?
#26
ghost
closed
3 years ago
0
Does Hwacha supports RVV extension
#25
ghost
closed
3 years ago
2
adjust for RC typeTag implementation
#24
timsnyder-siv
closed
3 years ago
1
Bump for RC Nov. / Chisel 3.4 / FIRRTL 1.4
#23
abejgonzalez
closed
3 years ago
1
Bump to July 2020 rocketchip
#22
jerryz123
closed
4 years ago
0
How to track float point MAC and integer ALU usage? How to track memory bus usage?
#21
roychen1998
opened
4 years ago
0
Does Hwacha support GDB？
#20
kangrl666
opened
4 years ago
1
Support using Hwacha with other RoCC accelerators
#19
jerryz123
closed
4 years ago
2
Stage / Phase RC Bump
#18
davidbiancolin
closed
4 years ago
0
Correction
#17
vineet1323
opened
4 years ago
0
Vector Atomic Memory Instructions
#16
roychen1998
closed
4 years ago
0
Scalar fdiv, fsqrt
#15
pentin-as
opened
4 years ago
0
VRU support
#14
roychen1998
closed
4 years ago
2
Fix for chisel and rocket-chip bump august 2019
#13
colinschmidt
closed
4 years ago
0
rv64uv-p-amoadd_w bug
#12
abejgonzalez
opened
5 years ago
4
to confirm whether the change of nvseq and nvlreq is right
#11
gxlong1983
opened
5 years ago
0
Correct initialization in LaneCtrl
#10
donggyukim
opened
5 years ago
2
how to add a reduction instruction
#9
gxlong1983
opened
5 years ago
1
vpl instruction: assertion failed
#8
ShuyunJia
closed
5 years ago
2
Hwacha Assertions
#7
palmer-dabbelt
closed
8 years ago
4
Use Bool object factory instead of soon-to-be-private constructor
#6
ucbjrl
closed
8 years ago
1
Fix hwacha to match new RoCC FPU interface
#5
zhemao
closed
7 years ago
3
Knob on HwachaNSRAMRFEntries
#4
sagark
closed
9 years ago
0
Updated ptw I/O to match rocket PR#6
#3
ccelio
closed
9 years ago
0
Added support for superscalar Rocket front-end.
#2
ccelio
closed
9 years ago
0
integrate high-performance vmu
#1
yunsup
closed
10 years ago
0