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Hi Taichi,
Thanks for taking care of this project! I am trying to compile it with Vivado, but I have some problems with Xelab, so I need some help.
More specifically, I tried these versions and …
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Vivado Simulator v2021.2
Copyright 1986-1999, 2001-2021 Xilinx, Inc. All Rights Reserved.
Running: /home/soc_qg/software/vitis2021.2/Vivado/2021.2/bin/unwrapped/lnx64.o/xelab --incr --relax --debug …
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There is no VPI/FLI support in Vivado, but this feature is in roadmap: https://support.xilinx.com/s/question/0D52E00006hpTc1SAE/xsimiki-documentation?language=en_US (maybe, one day...)
What do you …
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The Vivado simulator wrapper is unable to set top-level generics during simulation because the command line switch "-generic_top" does not work as documented in [UG900 (p89)](http://www.xilinx.com/sup…
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Hello,
I am running a simulation for Ibex demo system. I created a testbench file that instantiates ibex_demo_system.sv. The simulation works however in a TCL console I get a periodic messages that s…
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I encountered the following error while simulating with Vivado, it seems that some files are missing.
Vivado Simulator v2022.1
Copyright 1986-1999, 2001-2022 Xilinx, Inc. All Rights Reserved.
Run…
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It seems the current version of verilator doesn't support module like this:
```
module via (.a(w), .b(w));
inout w;
wire w;
endmodule
```
There was a discussion
https://forums.xilinx.com/t5…
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The vivado.py python script pulls the path to the vivado binary from either the user's path or from method argument, rather than from a env variable like the simulator paths. Modifying the `run_vivado…