taichi-ishitani tvip-axi issues

taichi-ishitani / tvip-axi

AMBA AXI VIP

Apache License 2.0

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issues

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fix typo

#56 sequencer closed 1 month ago
1
add Metrics DSim simulator support

#55 taichi-ishitani closed 1 month ago
0
Add dsim simulator support

#54 taichi-ishitani closed 1 month ago
0
Problems with Vivado simulator

#53 Nick1296 opened 2 months ago
4
Mismatch issue

#52 Nathanat77 closed 3 months ago
8
Path example for replacing `uvm_do* macros

#51 octavsly closed 5 months ago
1
delete response_queue when reset

#50 kkurenkov closed 1 year ago
0
axi_slave_sub_driver don't reset response_queue

#49 kkurenkov closed 1 year ago
4
where is the "class tvip_delay_configuration"

#48 sky1993-oppo closed 1 year ago
4
add areset_n to clocking event of master_cb/slave_cb

#47 taichi-ishitani closed 1 year ago
0
Problem with On the Fly Reset

#46 kkurenkov closed 1 year ago
5
Support Veridi Protocol/Performance Analyzer

#45 taichi-ishitani opened 1 year ago
0
fix *E,EXPRPA error reported by Cadence Xceium simulator

#44 taichi-ishitani closed 1 year ago
0
Cadence Xcelium doesn't support variable substitution in if-condition

#43 kazt81 closed 1 year ago
4
Not an issue but a general question

#39 neha-pqs closed 2 years ago
0
Add support to drive W channel before AW

#38 neha-pqs closed 2 years ago
7
Support vivado sim

#37 taichi-ishitani closed 2 years ago
0
add null check to avoid null pointer exception

#36 taichi-ishitani closed 2 years ago
0
Another NULL pointer dereference after reset in the middle

#35 kazt81 closed 2 years ago
7
Fix issue #33 NULL pointer dereference after the reset in the middle

#34 kazt81 closed 2 years ago
1
NULL pointer dereference is observed after the reset in the middle

#33 kazt81 closed 2 years ago
4
Support Vivado simulator

#32 taichi-ishitani opened 2 years ago
6
Change tvip_axi_data typedef from bit to logic to handle 4-state value

#31 kazt81 closed 2 years ago
6
Basic setup for local environement

#30 kazt81 closed 2 years ago
3
tvip_axi_if.sv interface ports are better to be defined as logic instead of bit

#29 kazt81 closed 2 years ago
1
Error when elab with Vivado

#28 aignacio opened 3 years ago
9
feature comparison to commercial VIPs

#26 simdream closed 3 years ago
1
use TVIP-AXI as a component within in_agent

#25 sfjiang-astri closed 3 years ago
1
problem about sequencer

#24 sfjiang-astri closed 3 years ago
2
error on find vif failure

#23 sfjiang-astri closed 3 years ago
11
use tvip-axi as a vip in the project

#22 sfjiang-astri closed 3 years ago
28
xcelium simulator

#21 sfjiang-astri closed 3 years ago
20
Support wvalid preceding awvalid

#20 taichi-ishitani closed 3 years ago
0
Slave driver data before address support

#19 GeorgianPencea closed 3 years ago
0
ID field for AXI4-Lite

#18 taichi-ishitani closed 3 years ago
0
uvm reg adapter supports AXI4 access

#17 taichi-ishitani opened 3 years ago
0
Add ability to generate non-byte access by reg API

#16 klevin92 opened 3 years ago
5
Fix Xcelium compilation warning

#15 klevin92 closed 3 years ago
1
/bin/sh: 0: Illegal option -h

#14 islengxw closed 4 years ago
2
Open Source Verilog Simulator with This

#13 coder-humbitious opened 4 years ago
1
Support AxProt signal

#12 taichi-ishitani closed 1 year ago
3
Support AxCache signal

#11 taichi-ishitani closed 1 year ago
0
fixed and wrapping burst support

#10 taichi-ishitani opened 4 years ago
0
RAL support

#9 taichi-ishitani closed 4 years ago
0
AXI4-Lite support

#8 taichi-ishitani closed 4 years ago
0
Hi!

#7 kkurenkov closed 5 years ago
10
fix #5

#6 taichi-ishitani closed 5 years ago
0
書き込んだデータが読み出せない

#5 taichi-ishitani closed 5 years ago
0
re-wrote random constraints to improve runtime performance (refs #3)

#4 taichi-ishitani closed 5 years ago
0
ランダム制約の書き直し

#3 taichi-ishitani closed 5 years ago
0