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## Steps to reproduce the issue
Applies to Yosys 0.9+2406 (git sha1 a9b61080, clang 10.0.0-4ubuntu1 -fPIC -Os)
Crashing on read_verilog
I have narrowed down the crash to the following code frag…
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Thank you very much for the package – I’ve been experimenting with it and making demos for my NHS clinical science students (masters and doctoral level).
Apologies if I’m missing something, but doe…
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Hello,
For the sake of achieving Direct Memory Access, I have created a small test module that reads a single memory address (`0xBC000000`) every 100 ms. This module is connected as master on the i…
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In case it helps I instrumented my `cp1252.py`
``` python
class IncrementalDecoder(codecs.IncrementalDecoder):
def decode(self, input, final=False):
try:
return codecs.charmap…
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**Why Mathjax**
Currently when adding Formulas or anything related to Syntax, need to be parsed in Mathjax. Many Data Scientists and Developers using this formulas are facing issues, that can be fixe…
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Hi,
I am using qcc 2.7.
Maybe I do miss something but it seems that the qcc package does not use 3*sd limits in my case:
```
library('qcc')
data('pistonrings')
diameter
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@eunchan
as we discussed, TLUL allow valid to be dropped without ready.
I tested on a_channel side and looks like design can handle it but these 2 internal assertions are triggered. Do you thin…
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eyabc updated
3 years ago