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Several improvements may be done:
-> Don't reexport the model to mrgsolve/RxODE at each iteration
-> Cache the mrgsolve/RxODE model if it does not change from iteration to iteration
-> Investigat…
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Can I generate a simulation trace that includes the memory addresses of the instructions executed, along with the information if it was a cache hit or miss?
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I'm trying to collect trace for a python application. I'm using drrun drcachesim tool. It seems it can collect the results of the cache simulation but fails to collect offline trace. python app does t…
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**Describe the bug**
Executing an x86 `mfence` instruction in two sibling SMT threads on the O3 CPU causes the CPU to get stuck. Specifically, it appears that one of the `mfence`s reaches the head of…
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Understand the potential overhead of switching from the current container to reference-based containers.
Currently, with AoS, we see roughly the same performance between LinkedCells and LinkedCells…
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# Quantum Measurement main checklist
## Design
- [x] **Sim folder and design doc created** (Date: 5/2/2024)
- [x] Create sim folder
in [PhET Sim Design Folder](https://drive.google.com/d…
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Universe properties (`Forces`, `KineticEnergy`, ...) can be expensive to compute. It would be nice to cache them.
But there are two difficult things in CS: naming and cache invalidation. Because thes…
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This is one that's been a long time coming but the introduction of the Room mechanic is gonna make this necessary. We're gonna need to refactor how names are handled in a way that resembles the way we…
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Hello,
I have seen that when viewing a map without being authenticated, when you interact with the map, a pop-up window appears asking me to authenticate. I close the window and it lets me continue i…
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**Describe the bug**
I am following the tutorial at https://esp.cs.columbia.edu/docs/singlecore/singlecore-guide/#fpga-prototyping-with-prebuilt-material and got an error when trying to run behaviour…