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Clash offers `BitVector`, but in memory mapped systems we often use bytes. To this end we've introduced type synonyms:
https://github.com/bittide/bittide-hardware/blob/703b881e8e468e7916dc01b2f8c49…
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I ran the datasets that you provided, and used the rosservice to save the map, as you can see the map in some where has the thick point cloud. So can you tell me how to adujst the parameters. and I s…
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FPGA world suffers a lot from fragmentation - some tools produce Verilog, some VHDL, some - only subsets of them, creating low-level LLVM-like alternative will help everyone, so HDL implementations…
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### Answers checklist.
- [X] I have read the documentation [ESP-IDF Programming Guide](https://docs.espressif.com/projects/esp-idf/en/latest/) and the issue is not addressed there.
- [X] I have updat…
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Is flow works of this package (**hdl_people_tracking**) dependent to the **hdl_localization**?
In other words, can **hdl_people_tracking** run without depending on **hdl_localization** and detect…
agn-7 updated
4 years ago
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Hi~ blensor is very impressive!
But I find some problems: when I use HDL-64E2, it seems to lose some area (the top of the car in the picture)
![image](https://user-images.githubusercontent.com/375…
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systemd version: v239
in source file `activate.c` line 280 in signal handler `sigchld_hdl`:
on line 288 is used non asynchronous-safe function `waitid`,
also on line 291 and 297 are used logging …
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At them moment, the Verilator simulation binary fails to build if the foundry repo is present.
Long term this should be fixed, e.g., by #ifdef-ing HDL blocks away that cause build failures), but in…
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Hi,
I am using the newest version of VsCode, hdl_checker-extension and hdl_checker-client. (Windows10)
As linter I use the ModelSim vcom.
It works good, while working on opened vscode and editi…
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@umarcor @LarsAsplund @JimLewis @eine @suzizecat @Paebbels @nfrancque I have been talking a bit with @qarlosalberto about potentially creating a sphinx builder/autodoc plugin for HDL, although I'm mor…