-
Hi, When transferring my micro-sd card and the hat from a perfectly functioning Raspberry Pi3B+ to a Pi4B, I get an SMI error:
/dev/smi no such file or directory...
Is the Pi4B not compatible or…
-
For Interrupts to work on Zephyr with EOS S3 (and so that SPI can work?): https://github.com/zephyrproject-rtos/zephyr/pull/28291
For OpenOCD flashing support to work on Zephyr: https://review.op…
-
Hi all,
The HWPE behavior between simulation and FPGA is different. I've tried it with pulp_soc v2.1.0, v3.0.0 and v3.0.1. They all show the same problematic behavior so far.
**INFO:** I'm using…
-
Hi @alanvgreen , @tcal-x ,
I just wanted to know if theres any way in which we can force the synthesis tool to use BRAMs for certain specific cfu storage variables instead of FFs or LUTRAMs. The issu…
-
你好，請問如果我獲得了 XSTop.v 文件之後，我下一步該如何在 FPGA 上面進行驗證呢。
我目前是開了一個 vivado 的專案，並且新增了一個 block designs，目前的思路為添加了XSTop.v之後將一些外設補齊，但是我發現我沒有辦法將 XSTop.v 加入到我的設計之中，想請問我該如何解決，亦或是我的方向與步驟做錯了，需要做額外的準備，感謝你!
[TRANSLATION…
-
Hai @doonny , I have run inference on De1-SoC board with VEC_SIZE=8 and LANE_NUM=8 (other parameters remain unchanged).
However, the **Total kernel runtime** is 236.344 ms instead of 149.988 ms giv…
-
Not certain how you want these, but I keep having this kernel error pop up on every boot. Using an Up2 board with NV4200. Primarily using default kernel options from meta-intel and meta-up-board, with…
dv01d updated
5 years ago
-
The demo is not currently buildable, as it is hard-coded to expect Libero SoC V2023.1 - but the current release is V2023.2.
### Replication
Install the latest Libero SoC and do the licence-server-…
-
Greetings,
I wanted to report an issue I was having using this go package. I recently got some used boards of ebay (claimed they still worked) to practice hacking on and the like. The reason I grab…
-
Hi, I was able to upload vexriscv to my Colorlight 5A-75E FPGA, however, if I reboot 2 times, it throws a data corruption error:
```
....
$ >reboot
__ _ __ _ __
/ / (_…