-
```
What steps will reproduce the problem?
1. Use r1.1 code with default voltage reference (1.1V)
2. Use a Witespy KV modded minimOSD board (22k/1k dividers)
3. Increase GUI calibration to max (255)
4…
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I started to add unit tests (using boost). Here is a check list.
- [ ] OpenCL (currently not used in Travis builds)
- [ ] IO
- [ ] GUI/ (GUI currently not used in Travis builds)
- [ ] Displa…
-
What would be needed to (if possible) to change the TX to an open collector like output.
I TX is LOW the output pin would be GND and if TX would be HIGH the pin would be floating (eg. high impedanc…
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Almost done with CPM but might need help adding motor/sensor models and with the development of the hybrid impedance control sim.
-
Hi @ascane, thank you for sharing this great work.
Currently, i am trying to use your simulation and i will modify for my research purpose on HSR, but when i run the program, i get this following er…
-
- Check for SC on power lines
- Solder Linear regulators and Power connector
- Check again for SC on power lines (result: 1K aprox. impedances)
- Connect power with ampmeter (result: power rails OK…
-
Hello @electrokean @DavidRTucker and everyone,
I have a case, the formula used to find the output of the hx711 module? can anyone help me ?
I use a 5 kg loadcell and a NodeMCU ESP8266 microcontrol…
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The issue is found in the documentation of the I2CMaster within the litex/soc/cores/bitbang.py file, at
[line 44](https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/bitbang.py#L17).
…
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Hello,
Recently i change a CBU with a ESP32-C3 and i try to implement Deep Sleep but only as pin can use 0, 1, 2, 3, 4, 5 support wakeup. But in Documentation write you can wake up on any Digital P…
-
```
What steps will reproduce the problem?
1. Use r1.1 code with default voltage reference (1.1V)
2. Use a Witespy KV modded minimOSD board (22k/1k dividers)
3. Increase GUI calibration to max (255)
4…