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需求：
1. 在 [LLVM24.09_mugen失败测试用例清单](https://docs.qq.com/sheet/DSnFpcEJyVnJYRGJ1?tab=BB08J2) 中找到测试套 tpm-quote-tools 失败的测试用例
2. 在 [openEuler LLVM 平行宇宙 24.09 版本](https://repo.tarsier-infra.isrc.ac.cn/…
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hello
tried to simulate vexriscv
followed the instructions from Linux.scala
the linux files are
VexRiscvRegressionData/sim/linux
laur@laurPC-100:~/lucru/cn/riscv/vexriscv-linux/VexRiscv/src…
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需求：
1. 在 [2403_mugen失败测试用例清单](https://docs.qq.com/sheet/DSkZMUm9vSHFhTURL?tab=BB08J2) 中找到测试套 tpm-quote-tools 失败的测试用例
2. 在[openEuler RISC-V 24.03 版本](https://repo.tarsier-infra.isrc.ac.cn/openEuler…
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Some new paths in function `createNewDirForFile` from `Paths.h`. Can be unavailable.
Example:
file = /home/utbot/.opam/4.08.0/share/sail/lib/sail.c
oldBase = /home/utbot/sail-riscv/c_emulator/SoftF…
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https://riscv.org/about/
https://en.wikipedia.org/wiki/RISC-V
**Description:**
RISC-V is a relatively new open standard instruction set architecture (ISA). With only 40 base instructions it is …
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### Is there an existing CVA6 bug for this?
- [X] I have searched the existing bug issues
### Bug Description
A couple of years ago, CVA6 did manage to successfully run the PMP benchmark. The PMP b…
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I modified the file rocket-chip/src/main/scala/system/Configs.scala
I've added a line: `class MyConfig extends Config(new WithJtagDTM ++ new DefaultConfig)`
Then i launch in rocket-chip/emulator `ma…
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`libfdt.so.1` is missing by default.
```bash
mx @ Phony in ~ |17:26:00 …
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When I change CoreMark for RISCV(spike or Rocketchip), I also find gettime() always return 0 (start_time() and stop_time() always return -1) . I think it may some problems of clock in emulator. Could …
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In this documentation page, https://riscof.readthedocs.io/en/latest/installation.html#install-plugin-models, there is an option to install the SAIL emulator as a docker image. After installing the doc…