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I work with a xilinx FPGA (spartan 6), with the ise toolchain, when i try to run the lab002 from fpga_101 i have an xst problem: ERROR: Xst: 2927 - "/home/hyde/Digital/Soc/fpga_101/lab002/build/top.pr…
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Is that an oxymoron?
Does Kvasir apply to an embedded linux implementation?
We are using an SOC that includes APUs that run an embedded linux as well as RPUs that look more like a traditional m…
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Hi, I'm following the doc on https://symbiflow-examples.readthedocs.io/en/latest/building-examples.html and the first 2 examples work fine, but litetx is not as clear.
First "Linux LiteX demo" does…
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In this step we need to use a different Flash offset address than the original 128K that was used by BrunoLevy in his tutorial. The Gatemate toolchain creates a bigger FPGA bitstream file that exceeds…
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Hi,
I was wondering if is it possible to use blue-rdma IP to enable the RDMA stack on the FPGA and connect it to the TX and RX interface of the Ethernet subsystem on the FPGA?
In addition, I tr…
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**Description**
ghdl-gcc and ghdl-llvm both produce a binary when building the FPGA target of microwatt, but ghdl-mcode does nothing.
**Expected behaviour**
I'm expecting an error, or a binary. I…
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**Type of issue**: bug report
**Impact**: API modification
**Development Phase**: request
**Other information**
When running
litex-boards/litex_boards/targets/sipeed_tang_primer_20k.p…
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as suggested by @mithro in https://github.com/SymbiFlow/fpga-tool-perf/pull/50#issuecomment-592180396 we should generate the following reports:
```================================
Settings
======…
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Sorry, if this is an offtopic, i'll move it to maillist if it's so. This is just common suggestions about "full metal runtime.js/nodejs" related to this #42 and this #43 issues.
Besides all feature…
danxn updated
9 years ago