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Greetings,
It is much appreciated if someone would kindly explain the internal workings of lbForth (any documentation available?).
How many stacks does lbForth have (data, return, control, float…
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I just want to give some praise where due: This project is amazing.
I am using it inside an emulated RISC-V emulator with a unique C++ environment. And now I can have Python syntax!
The only thing…
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Is there any documentation on what the HTIF ports actually are and how to use them? For example the CSR ports seem to be command ports, mem ports memory ports, which would imply the ipi ports are inst…
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Switching from android gcc to clang produces slower binaries.
#### Description
I am working on application what …
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I would like to simulate a LiteX SoC running VexRiscv with custom CPU plugins. Is there some way to import a LiteX SoC that's been compiled from source into Renode? If so, is there any documentation o…
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**Impact**: rtl
**Tell us about your environment:**
*Chipyard Version:* 1.3.0
*OS:* Linux ubuntu19portable 5.3.0-64-generic 58-Ubuntu SMP Fri Jul 10 19:33:51 UTC 2020 x86_64 x86_64 x86_64 GNU/L…
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Would it be possible to have execute-only code as a feature... somewhere in the toolchain? How would that work and which program would be responsible for supporting such a feature? Looking at readelf …
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Would be nice to have one.
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Hello,
I got these errors in emulator. I have never got them before. Could you please tell me why and how can I fix them ?
Thank you so much
```
alpha@alpha-VirtualBox:~/fpga-zynq/rocket-…
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Hi,
The board I'm testing is KC705.
At beginning I followed the steps according the steps in repo's README.
I did the "Pre-built Bitstreams/Linux images" step. i.e.
```sh
$ git clone http…