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Looks identical to issue #968
Today I've upgraded pgbouncer from 1.22.1-1.pgdg22.04+1 to 1.23.0-1.pgdg22.04+1 via `apt`.
1.5h after the upgrade I had this in the logs:
[...] FATAL @src/ob…
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**Type of issue**: other enhancement
**Impact**: API modification
**Development Phase**: proposal
**Other information**
**If the current behavior is a bug, please p…
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Hello,
we are facing a very frustrating problem. After we installed Ubuntu 18.04 and nextepc (from the ppa) according to the instructions on https://nextepc.org/installation/02-ubuntu about 3 weeks a…
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almost all the time are fine, inserting 50++data/s, etc
but sometimes (maybe once or twice a month), i get error that pgbouncer cannot connect to server.
any ideas how to debug / investigate it?
…
auzty updated
7 months ago
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@jmduarte We are trying to synthesize the example Conv2D model from hls4ml v0.1.4 in Vivado HLS 2017.2 for a different FPGA (xczu9eg-ffvb1156-2-i-es2) but we run into some memory issue. Here is the `k…
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### Bug Description
Analyzing the differences between the riscv-config.yaml, CSR.rst from IP-XACT and CSR.rst from Riscv-config, these improvments need to be done:
- Add legal values (0x0, 0x3) in…
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Im using systemrdl to implement my cores CSRs, with a generator that consumes a rdl file and compiles it to systemverilog files and thats working fine.
Now lets say I have 3 cores: A, B and C. The …
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I've been experimenting with the Quartus (`quartus_pow`) and Vivado (`report_power`) power analysis tools and would like to add support to Edalize/FuseSoC
For the most accurate results these tools …
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On many SOCs there are these convenience SET, CLR, INV registers that server to help modify individual bits of another 'real' register. Often times these are clearly defined in the XML (or other s…