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While adding designs in fpga-tool-perf for the nexys_video board, the following error showed up.
```
File "/media/newdrive/prjxray/fpga-tool-perf/env/conda/envs/symbiflow-env/lib/python3.8/site-pa…
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What is observed:
* A compiled litex bitfile for CMOD A7 35t using symbiflow toolchain does not work
* LED chaser does not blink the LEDs
* logging in via lxterm is not possible
* On the o…
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Hello,
I'm using the Broadcom® B50610 triple-speed PHY chip, and I'd like the FPGA run as MAC controller to communicate with the PHY chip.
I was wondering whether verilog-ethernet supports this …
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With the latest database from conda, the daisho-usb3 design fails in symbiflow with the following error:
```
prjxray.fasm_assembler.FasmInconsistentBits: FASM line "CMT_TOP_R_UPPER_T_X8Y200.PLL_CL…
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Hi,
I'm trying out the I2S interface of Pulpissimo and there are some things which didn't work as expected, when using the `pulp-rt-examples/tree/master/periph/i2s/pdm_capture` example with the fol…
bbo49 updated
4 years ago
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Hello! Thanks for your repositories first! I have a board=xc7k325tffg900-2(as the same as BOARD=kc705). However, it is RGMII for the ethernet on my board. (I have deleted the ethernet and then success…
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Hello,
I am trying to implement a cva6 on a Nexys A7 board. When I load the image on the board and try to load the demo through UART the program get stuck after this output
```
__ _ __ _ _m
…
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I am trying to reproduce the NaxRiscv/Debian setup as described [here](https://spinalhdl.github.io/NaxRiscv-Rtd/main/NaxRiscv/hardware/index.html) and am running into some issues.
Steps I have unte…
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First, let's start with a diagram of how RocketChip is wired into LiteX:
![](https://user-images.githubusercontent.com/1450143/102630245-9bac1c80-414c-11eb-92c9-311fd4e06bea.png)
Rocket has a ME…
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How to display via HDMI on linux system please? Is it by mounting the hdmi peripheral via liitex and then selecting the HDMI display related compilation options on buildroot, I tried to do this but it…