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Full log attached.
Error: Cannot find Spirit core configuration file for vendor:Actel library:SgCore name:PF_INIT_MONITOR version:2.0.204.
Error: The command 'create_and_configure_core' failed.
E…
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In current privilege spec, most upper half CSRs are described as "RV32 only".
But htimedeltah is described as "HSXLEN=32 only", and mseccfgh is described as "RV32 only" and "MXLEN=32 only" in two di…
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> with the sole purpose of enabling 64-bit load/store instructions from the RV64 base ISA into RV32.
with the purpose of enabling load/store operations with even-odd register pairs.
> This propo…
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Note that 32-bit FP and 64-bit FP both introducing new calling conventions.
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This is a meta-issue to discuss + track `gdbstub`'s LLDB compatibility story.
### Overview
LLDB uses the GDB Remote Serial Protocol for remote debugging, and for the most part, LLDB works "out …
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No one has been beating down the door requesting changeable XLEN, but since it'll probably happen eventually, I wanted to have a place to take notes on what changes need to be made. (cc @jerryz123 @s…
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I have a target using FreeRTOS v10.2 and when I tell gdb to switch to a suspended task and print a stack trace (`info threads`, `thread 2`, `where`) the stack frames are garbled. I noticed that most r…
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1. https://github.com/riscv/riscv-isa-manual/blob/bf5a151cda2a3e28a238f9c5f22575d38f7782b2/src/rv32.tex#L483
vs
https://github.com/riscv/riscv-isa-manual/blob/bf5a151cda2a3e28a238f9c5f2257…
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Hi:
The toolchain I am using is pulp-riscv-gnu-toolchain,when i "make helloworld",i have the error:
cc1: error: -march=IMXpulpv2: ISA string must begin with rv32 or rv64
Thanks!
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In the current design, some opcodes (e.g. KADD64) are defined to operate on 64 bits: i.e., a register pair in RV32, or a single register in RV64. This seems awkward to implement in configurable-XLEN …