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The PLL test (from https://github.com/SymbiFlow/fpga-interchange-tests/pull/68) that utilizes external feedback fails the FASM difference test on some routing features. There are no difference in feat…
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## Issue Description
Issue discovered in https://github.com/openXC7/nextpnr-xilinx/issues/20#issuecomment-1942858331
When IS_WCLK_INVERTED property is asserted, we expect the write to LUTRAM to …
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```
ERROR: [DRC PLCR-1] Placement Constraints Check for Clock Region(s): Design Check found an error in Clock Region X0Y0. This clock region has 17 clocks locked whereas only 12 clocks can be routed …
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When generating a large memory in Verilog, in some cases, parts of the BRAM INIT information is missing when the .bit file is converted to FASM.
Here is an example (memory was initialized to all 1'…
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After running the command, FAB_ROOT=.. nextpnr-generic --uarch fabulous --json test_design/${DESIGN}.json -o fasm=test_design/${DESIGN}_des.fasm
I see an error
ERROR: Max frequency for clock 'clk'…
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There is an issue with prjxray tools, specifically bitread, which prevents to correctly read the bitstream data, affecting the FASM output.
In particular, certain BRAMS in the bitstream have the IN…
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I don't see any documentation on how to perform a local install (i.e. under `/usr/local`).
If I run `make`, most of the sub-builds succeed generating `.so` files, although I get this error (@hzelle…
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Hi, I'm trying to compile and it fails at cmake. Sorry if this is neglect on my end, thanks!
```Software Version:
ProductName: Mac OS X
ProductVersion: 10.13.3
BuildVersion: 17D47
Compiler Ver…
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| | |
| --- | --- |
| Bugzilla Link | [31253](https://llvm.org/bz31253) |
| Version | unspecified |
| OS | All |
| Reporter | LLVM Bugzilla Contributor |
## Extended Description
There is no suppor…
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My laptop has 10GB available according to /proc/meminfo. I see this error running the `counter_test` example with `TARGET=nexys_video`:
```
Serial number (magic cookie) for the routing is: 416094…