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- ghdl/ghdl@8789de96
- ghdl-yosys-plugin 6ef4d46
- YosysHQ/yosys@3cb3978ff
The following file:
```vhdl :file: ent.vhd
library ieee;
use ieee.std_logic_1164.all,
ieee.numeric_std.all;
…
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**Description**
I'm trying to synthesize a FIFO with ghdl-yosys-plugin for an ice40 device. I don't use explicitly any RAM cell but GHDL+Yosys seems to detect one from an array of ```std_logic_vector…
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Completely different code for the other issue with the same title, so a separate issue. At least this one is nice and minimal.
```vhdl
library ieee;
use ieee.std_logic_1164.all;
entity test is…
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> https://twitter.com/mithro/status/1426666143914217474
>
> Check this out @mithro / @unaimarcor … we could base the HDL images on CentOS and use the already existing pre-built packages. Cristian is…
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When yosys is invoked with the flag `-m foo` or the command `plugin -i foo` is run — that is, with a non-absolute path to a dynamically loadable library — the loader will look for a file n…
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Cat() not behaving as i expect when i use slices ... Cat_object[slice] ...
Have tried a number of permutations ... assigning to a slice ... Cat_object[n].eq(rhs) or from a slice ... lhs.eq(Cat_obje…
scted updated
3 years ago
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With regards to your [VHDL formal verification article](http://pepijndevos.nl/2019/08/15/open-source-formal-verification-in-vhdl.html), I have some beginner questions on [PSL verification property](h…
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**Description**
in version 0.37 for mingw32, libghdl-0_37.dll is shipped without gnat runtime LIBGNAT-9.DLL and gcc runtime (in this case dwarf exception LIBGCC_S_DW2-1.DLL)
**Expected behaviour**…
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An assert fires in CXXRTL 'Assert `!is_lhs' failed in backends/cxxrtl/cxxrtl_backend.cc:969' with the attached test case.
This happens with the latest yosys codebase.
## Steps to reproduce the iss…
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Using GHDL as a frontend for Yosys allows synthesising VHDL, Verilog and/or mixed language designs. See https://im-tomu.github.io/fomu-workshop/mixed-hdl.html. It'd be interesting to test whether this…