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Which toolchain do you plan do use?
FWIW, just from the sideline, a Rust-based bare-metal real-time example targeting the *1x 64-bit RV64IMAC monitor/boot core* would rock!!
https://github.com/…
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# Tutorial for SymbiFlow with Buildroot Linux on RISC-V
# Brief explanation
Write a tutorial for getting started with SymbiFlow on a Linux-enabled RISC-V CPU on a mid-range FPGA with Buildroot L…
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Hello! @Dolu1990, I know you previously answered a similar question on issue #22. I running into the same error on the DE1-SOC which uses a Cyclone V chip. My confusion comes from the fact that you ha…
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```bash
(litexenv) :~/litex_install/litex-boards$ python -m litex_boards.targets.digilent_arty_z7 --build --load
INFO:SoC: __ _ __ _ __
INFO:SoC: / / (_) /____ | |/_/
INF…
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## Main idea
FPGA 加速器使用的IOMMU页表和CPU使用的MMU页表是同一套,因此FPGA可以直接使用va来访存,而不是依赖memory copy。作者认为现在的FPGA加速器要和cpu使用同一个va进行访存,需要设计一个SVM framework.
该工作提供的framework包括两个部分:
1. 运行在host cpu上的用来管理IOMMU svm的代码与…
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Hi ikwzm,
This is a great project thank you - I am considering using it on our MPSoC project which is based on U96v2.
Quick questions:
1. I assume the boot image HW is the same as the base U96V…
aawce updated
3 years ago
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# RT-Thread For Nuclei RISC-V Processor
## About branch for Nuclei
> **Make sure you have pulled latest changes from desired branch.**
* **nuclei/lts-v4.1.x**: Works for Nuclei RISC-V Process…
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I'm building a shell on VC707 (not _sifive/freedom_ repo). My system works well when the address map can be represented in 32-bit.
![image](https://user-images.githubusercontent.com/25481041/9940221…
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**Issue by [luminize](https://github.com/luminize)**
_Wed Aug 30 13:11:36 2017_
_Originally opened as https://github.com/machinekit/machinekit/issues/1264_
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Happens when trying to load a differ…
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# [LiteX] QEmu simulation of a LiteX generated SoC
More technical details at [Issue #86: Get lm32 firmware running under qemu to enable testing without hardware on HDMI2USB-misoc-firmware repo](htt…