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hi, so can I make my robot navigate to another point autonomously?
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Presumably this data needs to be properly cited. What information is required for that citation, and where should it go? Can it be part of the API meta information?
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I've been trying to generate the bitstream targeting VCU118 for benchmark purposes.
To generate the bitstream, [the wiki](https://github.com/fpgasystems/fpga-network-stack/wiki/Getting-Started-Guid…
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Hi
CC: @proppy
I am trying to install OpenEDA/PDK into my MAC M2 on Ubuntu(aarch64) 22.04 by UTM but seems there are some missing packages.
## Steps to Reproduce the Problem
> make timin…
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Hello,
I have found https://github.com/NetFPGA/P4-NetFPGA-public/wiki/IP-Checksum-Extern-Function that describes one extern for computing the IPv4 checksu.
I am working on a P4 NAT64 gateway tha…
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Hi @umarcor I think that this issue can be used as a *Pinned issue*, to discuss to add new awesome projects.
To inaugurate it, what about:
* [x] [pp4fpgas (Parallel Programming for FPGAs)](https:/…
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First of all: Thank you for maintaining this project.
I used a Terasic Development board in first semester but didn't learn Verilog or Altera HDL. Some minor VHDL knowledge is there, but it's not rea…
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The "not" unary operator is not working once we compile our IR code. For some reason, it just returns the value of whatever's next to it without negating it. If you run
ocamlbuild -use-ocamlfind h…
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i am run under hassos node-red dock
my hdl bus ip 192.168.88.2
hassos ip 192.168.88.5
docker ip 172.17.0.3
I have everything set up, but when I link, I get the error
{"connected":true,"status":…
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Hi sir, I notice that the testbench requires cocotb, cocotbext-axi, and Icarus. I would be appriciated to if you could provide the verilog based testbench without using myhdl.