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if nothing else, adding the image below to the 'img' directory and the Readme will help. time to start the Wiki?
![icebreaker_png_project-body](https://user-images.githubusercontent.com/6507573/62404…
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Hello,
i've searched the Aliexpress for absolute cheapest FPGA boards and i've found very cheap devices that i think might be worth supporting:
- Noname chinese bargain FPGAs
- https://hackaday…
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Are there any examples of programming an OrangeCrab using the soft RISC-V core, but with custom "gateware" for hardware accelerated peripherals? My goal is to largely program using C/assembly, but to …
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- [x] Rename at least nets to be compatible with D1.4 recommendation (preferably also ports of the RTM_Connector sheet)
- [ ] Change *NOT USED* to *ASSEMBLY VARIANT*, precisely highlight signals that…
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FPGA-level simulation is brittle and run rarely. When we do need it, we _really_ need it so it's probably worth forcibly checking that it works in the CI for a small target running the smallest assemb…
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@cliffordwolf @FSMaxB @gordon-quad
We need more examples, what do you all think we need to add? (hoping we could brainstorm, I also have some time this weekend to create stuff)
Some ideas:
- C->Ver…
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Xilinx/AMD FPGAs support Microblaze soft CPU (IP core).
What about support it's assembly/elf files?
Processor reference guide with ISA & opcodes can be found [here](https://docs.xilinx.com/v/u/e…
AJIOB updated
10 months ago
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Hey all,
I am working on controlling motors with a FPGA. You can see my working setup [here](https://youtu.be/-0uB2MydtrE) .
The video is not the greatest but it shows where I am at. Code for th…
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- [x] run `example.c` and examine the `main` function and how `mini_core` performs it
- [x] Examine the trackers inside the `target/mini_core` directory
- [x] use the following [line] (https://fpga…
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The genericism of Stabilizer is a limitation to the performance when using Pounder (input stage limited in slew rate, distortion noise to achieve flexibility, layout is tight and complex/high viscosit…