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elhep
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AFCZ
AMC FMC Carrier board based on ZYNQ Ultra Scale + SoC
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v2.1 changelog
#158
filipswit
opened
10 months ago
0
v2.1 changes and wishlist
#157
filipswit
closed
9 months ago
2
MGT CLK overdrive
#156
gkasprow
opened
3 years ago
1
changelog v2.0
#155
gkasprow
opened
3 years ago
3
shorted signals in PM part
#154
gkasprow
opened
3 years ago
1
Directionality of IC57
#153
marmeladapk
closed
3 years ago
0
Missing file when opening project cloned from git
#152
marmeladapk
opened
3 years ago
0
Is this hole necessary?
#151
filipswit
closed
3 years ago
1
Flash memory for user data connected to PL
#150
kaolpr
closed
3 years ago
8
Si57x PL direct I2C
#149
kaolpr
closed
3 years ago
0
BoM - Availability
#148
marmeladapk
closed
3 years ago
1
Reducing BoM count
#147
marmeladapk
closed
3 years ago
5
Add outputjob file
#146
marmeladapk
closed
3 years ago
0
IC71 doesn't have a decoupling capacitor
#145
marmeladapk
closed
3 years ago
0
VCU supply should be 0V9 not 0V85
#144
marmeladapk
closed
3 years ago
3
String "ADD VARIANT with C988"
#143
marmeladapk
closed
3 years ago
1
Move RTM_GTP.GTP0-3_CLK_IN to clock capable pins
#142
marmeladapk
closed
3 years ago
0
Bank 66 supports LVDS input so termination resistor is not needed
#141
marmeladapk
closed
3 years ago
0
Bank 87 does not support differential standards at 3V3
#140
marmeladapk
closed
3 years ago
2
Connect PS_ERROR_OUT and PS_ERROR_STATUS to MMC
#139
marmeladapk
closed
3 years ago
0
Consider connecting dedicated SYSMON pins to I2C bus
#138
marmeladapk
closed
3 years ago
0
Connect Vp and Vn to GNDADC
#137
marmeladapk
closed
3 years ago
0
Add 100nF to PSADC VCC and VCCADC
#136
marmeladapk
closed
3 years ago
0
Connect GND_PSADC to GNDADC
#135
marmeladapk
closed
3 years ago
0
Connect VREFP and VREFN to GNDADC
#134
marmeladapk
closed
3 years ago
0
PS_SRST should be pulled up not down
#133
marmeladapk
closed
3 years ago
0
Change R512 to 4k7
#132
marmeladapk
closed
3 years ago
0
Use stronger pullup on PS_MODE
#131
marmeladapk
closed
3 years ago
0
Clean up pudc and por override connections
#130
marmeladapk
closed
3 years ago
0
I2C address map
#129
marmeladapk
closed
3 years ago
0
Reduce pullup strength on SDA/SCL0..7
#128
marmeladapk
closed
3 years ago
0
FMC CLK DIR should have 100k pulldown to GND
#127
marmeladapk
closed
3 years ago
0
DNP R355 or TR1
#126
marmeladapk
closed
3 years ago
0
Connect reset of GPIO expander to P3V3 through pullup
#125
marmeladapk
closed
3 years ago
3
CDR_CLK_CTRL.SI5324_INT_ALM isn't connected
#124
marmeladapk
closed
3 years ago
0
FMC2_CLK.CLK2_BIDIR has three start/endpoints
#123
marmeladapk
closed
3 years ago
1
Clock polarity is swapped on clock switch
#122
marmeladapk
closed
3 years ago
0
GTX_CLK_CUST2C is AC coupled twice
#121
marmeladapk
closed
3 years ago
0
Clean up VDDO connections of Si5341
#120
marmeladapk
closed
3 years ago
0
R296 is not neccecary, FPGA can terminate the clock
#119
marmeladapk
closed
3 years ago
2
Swap FB_IN with Si5341 OUT9 for zero-delay mode
#118
marmeladapk
closed
3 years ago
0
Why is R641 DNPed?
#117
marmeladapk
closed
3 years ago
2
Clock management schematic has no DNPed parts
#116
marmeladapk
opened
3 years ago
1
PS doesn't have access to INTn signal of ETH switch
#115
marmeladapk
opened
3 years ago
1
Why are there two RGMII ETHs connected to the PS?
#114
marmeladapk
closed
3 years ago
1
Why is ETH1 MII CRS shorted with RX_DV?
#113
marmeladapk
closed
3 years ago
1
P5_MODE[2:0] is 0x2 not 0x1 (MII MAC not MII PHY)
#112
marmeladapk
closed
3 years ago
2
Add ground port on pin 36 of IC23
#111
marmeladapk
closed
3 years ago
0
MLVDS_RE is active low
#110
marmeladapk
closed
3 years ago
0
MLVDS_AMC_PORTS.Rx18 has wrong polarity on IC13
#109
marmeladapk
closed
3 years ago
0
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